Re: [TSCM-L] New Icom R-1500 / IC-PCR1500

From: Greg Perry <gr..._at_liveammo.com>
Date: 29 Jan 2006 09:04:00 -0400

-----Original Message-----
From: "James M. Atkinson" <jm..._at_tscm.com>
Date: Sunday, Jan 29, 2006 1:58 am
Subject: [TSCM-L] New Icom R-1500 / IC-PCR1500

The FCC finally approved the new Icom PCR-1500 Friday, 1/27/2005 .

You *** WILL *** need a computer with a USB 2.0 interface AND a processor speed of 3+ GHz to squeeze the maximum performance out of this radio, but it is absolutely going to have major impact on the TSCM business as it will find bugs extraordinarily quickly. I had a couple of the early one accidently find it's way home with me during an overseas trip and I was so impressed with the radio that I ran out and bought two new laptops just to dedicate to the radios. The real point of pain with these radios is that you must have a power computer to really squeeze out the performance.

When you purchase one be sure to purchase the version with the control head, and the UT-106 Notch Filter. Take off the Icom supplier filter on the control head cable and add your own on both ends, and run the radio on a DC battery source instead of using the provided AC power supply.

The FCCID number is AFJ288000, and first legal shipments are already available in Canada early next week (R1500-10 Model), and the U.S. version should be available in the U.S,. 2 to 3 weeks from now. The FCC approved versions are blocked from 824-849 and 869-894 MHz, but the Canadian versions are not blocked at all. If someone is skilled with surface mount diodes, resistors, and capacitors they could perform some very naughty modifications which we will not discuss here.

If you have an OSC-5000 you should buy two to four of these radios so that you can connect one to the IF output port, and a second one to the Discriminator or Base Band output. and keep a really close eye on the signals. While Icom has not announced it yet the software section of the radio can be "modified" to demodulate non-standard signals, and given the tight filters and frequency coverage you will be able to detect covert video signals with this radio. The best TSCM usage will be a six foot tall CONICAL or BICONICAL antenna with a double shielded cable direct to the radio, but keep the radio and computer at least six feet away from the antenna.

If you can spring it then purchase four of these radio to play with and hitch them up to a single laptop. Yeah, sure you will get mild performance hits, but you can set them up to a signal power supply, and simple USB hub. I suggest that the first radio be programmed with bug frequencies between 50 to 150 MHz, a second between 150 to 350 MHz and the third from 350 to 700 MHz, the fourth radio can be set up to pickup from 700 to 1300 MHz. This way you can center each radio on a specific dedicated band, with a dedicated antenna, and since you will not be band hopping you will be able to score some really serious sensitivity. Also, if you soft the data file from highest to lowest, and allow the computer to tune the radio's instead of allowing the radio to "scan" you will also get performance that is 40 to 60 times more sensitive.

The coverage below 50 MHz is fairly cheesy, and for lower frequencies the WinRadio G-313 (http://www.winradio.com/home/g313e.htm) is a much better SDR than the PCR-1500. Above 1.3 GHz you get a lot of convertor loss, but the conversion loss is actually much less than what is seen in a lot of other TSCM gear.

The radio has a spot where the 10.7 IF can be tapped, and the 450 kHz can be tapped at for before the final IF or at the discriminator for base band output.

-jma



<CIRCUIT DESCRIPTION>
[CONTROL UNIT]
<CPU>
IC7 is an 8-bit microprocessor. IC7 controls each power line switch, VR, etc. Communicating with the LOGIC UNIT, the CPU also controls displays, each functions.
<CPU RESET CIRCUIT>
IC2 detects the voltage of the VDD line. When the detected voltage is higher than regular voltage, IC2 outputs �H�
level signal to the CPU for reliable reset of the CPU.
<LCD DISPLAY>
The LCD display (DS24) employs a 1/4 duty custom-made LCD for large and well-visible characters and indicators on the display. The LCD is driven by the CPU directory.
<LCD AND KEY BACK LIGHT>
The brightness of the LCD and keys are controlled by Q1, Q3 and D5 witch are controlled by CPU.
Q6 and Q7, select the colors of LCD back light and keys from amber, green, yellow.
<DATA INTERFACE>
Communications with MAIN-A UNIT are provided by control signal (�TDATA�) from the CPU of the LOGIC UNIT,
and control signal from (�RDATA�) the CPU of the CONTROL UNIT.
<POWER SUPPLY>
The voltage for the CONTROL UNIT is supplied from HV line of MAIN-A UNIT via regulator IC (IC5).
[LOGIC UNIT]
The LOGIC UNIT composes of CPU, I/F circuit, Reset circuit, Noise squelch circuit, DTMF decode circuit, AF circuit and Regulator circuits.
<CPU>
IC18 is a 16-bit single chip microcomputer, and provides various functions for the receiver.
X4 oscillates 12 MHz clock signal for the CPU, and D26, C233, C234 compose of a clock frequency sift circuit.
IC14 is a memory devise, and stores adjustment data and memory channels (1000ch).
<I/F CIRCUIT>
Communications with connected P.C. and the receiver are provided through the USB interface.
<CPU RESET CIRCUIT>
IC35 is a reset IC contains delay circuit, and provides reliable reset of the CPU.
<NOISE SQUELCH CIRCUIT>
The noise signal from the MAIN-A unit is applied to the CPU (IC18), the CPU toggles the AF output ON and OFF
with detecting the condition of the noise signal.
<AF CIRCUITS>
(1) AF AMPIFIERS
FM-demodulated signals from the MAIN-A UNIT are passed through the AF selector (IC4), AF filter circuit
(IC27), AF selector (IC23), AF amplifier (Q18), VR (audio level adjustment; IC17) and mute switch (Q12), and
then applied to the AF power amplifier (IC12).
(2) USB AUDIO
Divided AF signals at the input side of VR (IC17) are amplified by Q15 and applied to the P.C. through the USB
audio IC (IC16).
<SIGNALING CIRCUIT>
(1) DTMF DECODE CRICUIT
�FDET� signal from the MAIN-A UNIT is applied to the DTMF decode IC (IC19) and IC19 outputs control signal
to the CPU according to the DTMF signal.
(2) VSC CIRCUIT
�FDET� signal from the MAIN-A UNIT is passed through the VSC filter (IC21), applied to the CPU and
processed.
(3) TONE CIRCUIT
�FDET� signal from the MAIN-A UNIT is passed through the tone filter (IC21) and applied to the CPU for being
processed.
<REGULATOR CUIRCUITS AND POWER SUPPLY LINES>
(1) CPU5V
CPU5V is provided by the regulator (IC3), the voltage is supplied to the IC18, CPU, IC35, RESET-IC, IC14,
(2) VCC
�PWR� signal from the CPU turns Q4 ON, and the voltage of the HV line is applied to each circuits.
(3) L5V
+5 V for the logic circuits from IC9.
(4) A+5V
+5 V for MAIN-A UNIT from IC6.
(5) A+8V
+8 V for MAIN-A UNIT and DCDC circuit.
(6) -5V
-5 V for the MAIN-A UNIT, the voltage is converted from 8V at DCDC circuit (IC8, D6, D8).
(7) +33V
Up-converted from VCC line at DCDC circuit (IC2, D2, L2), and down-converted into 24 V by the ripple filter
(Q9,C54)
(8) AF+8V
Power supply of IC12.
(9) USB3.3V
3.3 V for the USB circuits, the voltage is based on the output voltage of IC1.
<RF CIRCUITS>
(1) ATTENUTOR CIRCUIT
The RF signals 1.3 GHz and below are passed through the ATT SW (D1) and antenna SW�s for each bands.
While the ATT is OFF, Q1 and Q2 are turned ON and the RF signals are passed through D1.
While the ATT is OFF, Q1 and Q2 are OFF, and Q8 and D3 are turned ON to lead the RF signals to L-type ATT
(R9, R10) for 20 dB of level reducing.
(2) HF FILTER CIRCUIT
The RF signals 0.01 to 50 MHz are passed through the diode SW (D9) and LPF (L20, L26, C54, C60, C68, C72,
C81, C88). The LPF prevents the spurious components from emitting.
The D24 (PIN diode) at the output side of the LPF prevents the received signal to be distorted when the received
signals are strong, by applying the �RSSI� signal current-amplified by Q75 to the D24.
The RF signals 1.8 MHz and bellow are passed through the diode SW (D29, D56) and LPF (L48, L52, C134, C148,
C171), then applied to the 1st mixer.
The RF signals 1.8 to 15 MHz are passed through the diode SW (D25, D49) , LPF (L47, L50, C120, etc.), HPF (L57,
L172, L60, C150, etc.) then applied to the next RF amplifier circuit. The RF signals 15 to 30 MHz are passed through the diode SW (D82, D83) , LPF (L46, L49, C116, etc.), HPF (L57,
L55, L58, C139, etc.), then applied to the next RF amplifier circuit. The RF signals 30 to 50 MHz are passed through the diode SW (D30, D48) , HPF (L77, L82, C201, etc.) then
applied to the next RF amplifier circuit.
(3) HF RF CIRCUIT
Q22 and L87 composes a wide-frequency-range RF amplifier circuit and amplifies the RF signals 1.8 to 50 MHz.
(4) The RF signals 50 to 1300 MHz are passed through the diode SW (D7) , HPF (L5, C33, C34.) to remove the strong
HF signals, then applied to the BPF�s each band.
- The RF signals 50 to 150 MHz are passed through the diode SW (D5) , HPF for removing unwanted signals,
then applied to the next RF amplifier (Q15).
Q12 shifts the cut-off frequency of the HPF using �VCO1 signal �for improvement of frequency characteristic.
- The input and output of the RF amplifier are tuned on the receiving frequency, the amplified signals are then
applied to the 1st mixer via D44.
- The RF signals 150 to 350 MHz are passed through the diode SW (D6) , HPF (L10, L12, C40, C42. C45, C50,
C64) for filtering off the RF signals lower than 150 MHz, The input and output of the RF amplifier are tuned
on the frequency, the amplified signals are then applied to the 1st mixer via D46.
- The RF signals 350 to 700 MHz are passed through the diode SW (D14) , HPF (L24, C65, C71) for filtering off
the RF signals lower than 300 MHz, The input and output of the RF amplifier are tuned on the receiving
frequency, the amplified signals are then applied to the 1st mixer via D47
- The RF signals 700 to 1300 MHz are passed through the diode SW (D13) ,two-staged BPF for removing
unwanted signals, and applied to the RF amplifier (Q18) tuned on the receiving frequency with D33, D34.
- The output of the RF amplifier is matched by D40, D41, and the shifting of the center frequency of the BPF
are controlled by the tuning voltage. The amplified signals are applied to the 1st mixer via D45.
<CONVERTER CIRCUITS>
The received signals higher than 1300 MHz are passed through the D15, amplified by Q11, passed through HPF,
amplified again by IC5, then converted into the 1st IF signal by IC6. The converted 1st IF signal is passed through
the D42, then applied to the RF amplifier.
The VCO (Q19, L70, C197, D43, C209, etc.) generates the 1001 MHz LO signals and applied to the 1st mixer
(IC6).The 2002 MHz LO signals are generated by being tripled the VCO output, and applied to the 1st mixer
(IC6).
<1ST IF AMPLIFIER>
The RF signals from the RF circuits are converted into the 266.7 MHz 1st IF signal at the double-balanced 1st
mixer (IC14, L106, L109, L112). The converted 1st IF signal is passed through the SAW filter (FI1) to be filtered
spurious noise and amplified at the 1st IF amplifier (Q44), then applied to the 2nd IF circuits.
<2ND IF CIRCUITS>
The 1st IF signal from the 1st IF amplifier (D44) is converted into the 10.7 MHz 2nd IF signal at the 2nd IF mixer
section of the FM IF IC. The converted 2nd IF signal is applied to the Q60 for the modulation signal, to the FI2 for the reference signal of the band-scope indicator.
(1) BAND-SCOPE CIRCUIT
A portion of the output signal of the 2nd IF mixer are applied to the mixer section of the FM-demodulation IC
(IC20) and converted its frequency into the 450 kHz. The converted signal is passed through the FI4 to be filtered
spurious components out, and applied to the IC20 again.
The RSSI voltage in proportion to the received signal strength is applied to the LOGIC UNIT as the �SCAD�
signal.
(2) 10.7 MHz IF FILTER SWITCHING CIRCUIT
The 2nd IF signal from the IC19 is buffer-amplified by Q60 and applied to the filter switching circuit (D66, D67, D70, D71) and the selected signal is passed through FI5 (BW:50 kHz) or FI6 (BW:230 kHz) to be filtered out out-of band signals.
(3) 10.7 MHz 2ND IF AMPLIFIER
The 2nd IF signal from 2nd IF filter circuits is amplified by noise blanker gate (Q66) and passed through the diode
switch (D78, D79, D90, D91), and then applied to the FM IF IC (IC24; NFM mode, IC16; WFM mode).
(4) DEMODULATION CIRCUIT (WFM)
The 2nd IF signal from the D91 is applied to the WFM-demodulator (IC16, pin2) and demodulated by
discriminator X3.
The demodulated signals are de-emphasized by capacitors and resister.
(5) NOISE BLANKER CIRCUIT
IF the level of noise components (pulse-type) in the 2nd IF signal crosses the threshold level which determined by
R283 and R284, Q52 is turned ON and Q65 is turned OFF. Thus the drain current of Q66 is cut out and the 2nd IF
also is cut out.
<3RD IF AND DEMODULATOR CIRCUITS>
IC24 is an FM IF IC and contains 3rd mixer, limiter amplifier, quadrature detector, noise detector in its package. The 3rd IF signal from the 3rd mixer is amplified and passed through the 450 kHz filter, 3rd IF amplifier (Q61),
buffer amplifier (Q63), and then applied to the AM/SSB detector circuits.
(1) 3RD LO OSCILLATOR CIRCUIT (REFERENCE SIGNAL GENELATER)
The 3rd LO signal oscillated TCXO (X1) is amplified by Q80 and applied to the PLL/DDS circuits. A portion of
the 3rd LO signal from the Q80 are passed through Q71 for level adjustment and applied to the IC24 as the 3rd LO
signal.
The oscillation frequency of the TCXO (X1) are controlled by the �REFV� voltage applied to the �VCONT�
terminal.
(2) 3RD MIXER CIRCUIT
10.7 MHz 2nd IF signal is applied to the 3rd mixer circuit of the IC24 and converted into the 450 kHz 3rd IF signal by being mixed with the 3rd LO signal.
(3) 450 kHz IF FILTER SWITCH CIRCUIT
D68, D69, D72, D73, D93-D96 composes of the IF filter circuit and selects a filter from bellow.
-When the IF filter switch control signal is �
�FIL0�, the 3rd IF signal is passed through FI7 (BW: 2.8 kHz).
�FIL1�, the 3rd IF signal is passed through FI8 (BW: 6 kHz).
�FIL2�, the 3rd IF signal is passed through FI9 (BW: 15 kHz).
�FIL3�, the 3rd IF signal is by-passed all of filter.
(4) FM-DEMODULATOR CIRCUIT
The 3rd IF signal is applied to the IC24 and detected by ceramic discriminator (X2), and the FM-demodulated signals are applied to the LOGIC UNIT and IC8.
(5) NOISE SQUELCH CIRCUIT
The noise components in the demodulated signals are applied to the IC8 for level adjustment, then amplified at filter amplifier in the IC24.
(6) AM-DEMODULATOR CIRCUIT
The 3rd IF signal is converted its impedance into high one, and demodulated by D75.
(7) SSB/CW DEMODULATOR CIRCUIT
The 3rd IF signal from Q63 is mixed with BFO signal by the IC23 to be converted into the AF signals.
(8) AGC CIRCUIT
Except in WFM mode, Q67 drives the AGC line using RSSI voltage from IC24. In WFM mode, Q58 drives the AGC line using RSSI voltage from IC16.
<OTHER ANLOG CIRCUITS>
(1) PIN/ATT DRIVE CIRCUITS
While receiving lower than 50 MHz, S-meter reference voltage from IC25 is current-amplified by Q75 and drives
PIN/ATT (D24).
While receiving higher than 50 MHz, Q72 mute the line using �B4B7� signal.
(2) AF LINE SWITCHING CIRCUIT
The demodulated signals (WFM/AM/SSB) are applied to the analog-gate of the IC27. The IC27 selects the AF line to
output the AF signals to the LOGIC UNIT from 3 AF lines.
(3)V/UHF AGC CIRCUIT
The AGC voltage is non-inversion-amplified by IC25 to synchronize the AGC characteristic of the IF circuit and
V/UHF circuit.
<PLL CIRCUITS>
The PLL system of this receiver is composed of, 1st LO loop, 2nd LO loop and BFO/SCOPE LO loop.
(1) 1ST LO LOOP
The IC10 is a PLL IC which contains 2-modular pre-scaler and is able to construct a pulse-swallow PLL synthesizer.
The 10.25 MHz reference frequency signal is oscillated by X1, the reference frequency signal amplified by Q80 and Q24, then applied to the PLL IC (IC10) for reference.
The output of the phase comparator is applied to the VCO1 (Q27, Q28) and VCO2 (Q29, Q30) via the loop filter and
charge pump
The VCO1 is composed of Q27, Q28, VCO2 is composed of Q29, Q30 and each output signal is amplified by IC15 and
applied to the 1st mixer for frequency conversion. A portion of the output signals are applied to the PLL IC (IC10) as feedback.
(2) 2ND LO LOOP
The IC10 is a fractional PLL IC and provides narrow tuning steps.
The 10.25 MHz reference frequency signal is oscillated by X1, the reference frequency signal amplified by Q80 and Q31, then applied to the PLL IC (IC13) for reference.
The output of the phase comparator is applied to the VCO (Q47) via the loop filter and charge pump
The output signals are buffer-amplified by Q50 and Q41, applied to the 2nd mixer (IC19) for frequency conversion as
the 254.947301 to 257.0027 MHz 2nd LO signals.
A portion of the output signals are applied to the PLL IC (IC13).
(3) BFO/SCOPE LO
BFO signals (447.3 to 452.7 kHz) and SCOPE-Lo signals (10.35 to 11.35 MHz) are oscillated by IC22,
The reference signals are tripled by Q48, and passed through the HPF, LPF and IC21 for waveform adjustment, and
then applied to the IC22.



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