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Expedition PCB - Pinnacle - Version 2013.0.543.380
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Job Directory:        S:\Projects\156-DDR4\DDR4x16_SI\Design\71-563300-A\PCB\

Design Status Report: S:\Projects\156-DDR4\DDR4x16_SI\Design\71-563300-A\PCB\LogFiles\DesignStatus_00.txt

Tue Jan 28 16:53:49 2014

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DESIGN STATUS
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Board Size Extents  ............ 0.64961 X 0.70866 (in)
Route Border Extents  .......... 0.62961 X 0.68866 (in)
Actual Board Area  ............. 0.46035 (in)
Actual Route Area  ............. 0.43359 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    0.9207 Sq. (in)   0.48354 Sq. (in)  52.52 %

Pins  .......................... 358
Pins per Route Area  ........... 825.67324 Pins/Sq. (in)

Layers  ........................ 6
    Layer 1 is a signal layer
        Trace Widths  .......... 5
    Layer 2 is a Positive Plane Layer with nets
        VDD
        Trace Widths  .......... None.
    Layer 3 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... 3
    Layer 5 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 6 is a signal layer
        Trace Widths  .......... 5

Nets  .......................... 101
Connections  ................... 298
Open Connections  .............. 0
Differential Pairs  ............ 0
Percent Routed  ................ 100.00 %

Netline Length  ................ 0 (in)
Netline Manhattan Length  ...... 0 (in)
Total Trace Length  ............ 8.25193 (in)

Trace Widths Used (th)  ........ 3, 5
Vias  .......................... 96
Via Span  Name                   Quantity
   1-6    Via 616th_Tented       96

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 126
    Parts Mounted on Top  ...... 83
        SMD  ................... 1
        Through  ............... 0
        Test Points  ........... 82
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 43
        SMD  ................... 43
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    Edge Connector Parts  ...... 0

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 178
    Holes per Board Area  ...... 386.66155 Holes/Sq. (in)
Mounting Holes  ................ 0
