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Expedition PCB - Pinnacle - Version 2012.0.493.563
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Job Directory:        \\FILESERVER2\Astek\Projects\92-GDDR5\DDR4_new\Design\PCB\

Design Status Report: \\FILESERVER2\Astek\Projects\92-GDDR5\DDR4_new\Design\PCB\LogFiles\DesignStatus_01.txt

Mon Nov 19 17:12:14 2012

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DESIGN STATUS
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Board Size Extents  ............ 0.63 X 0.71 (in)
Route Border Extents  .......... 0.61 X 0.69 (in)
Actual Board Area  ............. 0.45 (in)
Actual Route Area  ............. 0.43 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    0.89 Sq. (in)     0.38 Sq. (in)     42.42 %

Pins  .......................... 341
Pins per Route Area  ........... 801.28 Pins/Sq. (in)

Layers  ........................ 5
    Layer 1 is a signal layer
        Trace Widths  .......... 5
    Layer 2 is a Positive Plane Layer with nets
        V1.2
        Trace Widths  .......... None.
    Layer 3 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... 4.5, 5
    Layer 5 is a signal layer
        Trace Widths  .......... 5

Nets  .......................... 101
Connections  ................... 307
Open Connections  .............. 0
Differential Pairs  ............ 0
Percent Routed  ................ 100.00 %

Netline Length  ................ 0 (in)
Netline Manhattan Length  ...... 0 (in)
Total Trace Length  ............ 13.8 (in)

Trace Widths Used (th)  ........ 4.5, 5
Vias  .......................... 85
Via Span  Name                   Quantity
   1-5    Via 616th_Tented       85

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 136
    Parts Mounted on Top  ...... 88
        SMD  ................... 5
        Through  ............... 0
        Test Points  ........... 83
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 48
        SMD  ................... 48
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    Edge Connector Parts  ...... 0

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 168
    Holes per Board Area  ...... 376.34 Holes/Sq. (in)
Mounting Holes  ................ 0
