
                                DRC - (Final DRC)
                                -----------------

                      10:09 AM Wednesday, February 05, 2014
 Job Name: S:\Projects\156-DDR4\DDR4x16_Riser\Design\71-562300\PCB\71-562300.pcb


    ---------
    PROXIMITY
    ---------
    
    Use DRC Window                   : NO


    Disable Same Cell Pad-Pad Checks : NO


    Enable Same Net Pad-Pad Checks   : NO

    
    Layers Specifed To Check         : Layer 1
                                       Layer 2
                                       Layer 3
                                       Layer 4




    Net Class Clearances And Rules
    ------------------------------

        Part Pads SMD Layer 1 TO Part Pads SMD Layer 1
            No Hazards.

        Part Pads SMD Layer 1 TO Via Pads Layer 1
            No Hazards.

        Part Pads SMD Layer 1 TO Via Holes Layer 1
            No Hazards.

        Via Pads Layer 1 TO Via Pads Layer 1
            No Hazards.

        Via Pads Layer 1 TO Via Holes Layer 1
            No Hazards.

        Via Holes Layer 1 TO Via Holes Layer 1
            No Hazards.

        Via Pads Layer 2 TO Via Pads Layer 2
            No Hazards.

        Via Pads Layer 2 TO Via Holes Layer 2
            No Hazards.

        Via Holes Layer 2 TO Via Holes Layer 2
            No Hazards.

        Via Pads Layer 3 TO Via Pads Layer 3
            No Hazards.

        Via Pads Layer 3 TO Via Holes Layer 3
            No Hazards.

        Via Holes Layer 3 TO Via Holes Layer 3
            No Hazards.

        Part Pads SMD Layer 4 TO Part Pads SMD Layer 4
            No Hazards.

        Part Pads SMD Layer 4 TO Via Pads Layer 4
            No Hazards.

        Part Pads SMD Layer 4 TO Via Holes Layer 4
            No Hazards.

        Via Pads Layer 4 TO Via Pads Layer 4
            No Hazards.

        Via Pads Layer 4 TO Via Holes Layer 4
            No Hazards.

        Via Holes Layer 4 TO Via Holes Layer 4
            No Hazards.


        Total Hazards Found : 0




    Planes Clearances And Rules
    ---------------------------

        Positive Planes Layer 2 TO Route Border
            No Hazards.

        Positive Planes Layer 2 TO Via Pads Layer 2
            No Hazards.

        Positive Planes Layer 2 TO Via Holes Layer 2
            No Hazards.

        Positive Planes Layer 3 TO Route Border
            No Hazards.

        Positive Planes Layer 3 TO Via Pads Layer 3
            No Hazards.

        Positive Planes Layer 3 TO Via Holes Layer 3
            No Hazards.


        Total Hazards Found : 0




    Non-Net Class Element To Element Clearances And Rules
    -----------------------------------------------------

        Route Border TO Via Pads Layer 1    Clearance: 0mm
            No Hazards.

        Part Pads SMD Layer 1 TO Route Border    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Holes Layer 1    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Pads Layer 1    Clearance: 0mm
            No Hazards.

    >>  Board Outline TO Placement Outlines Layer 1    Clearance: 0.254mm
            Hazards Found : 1

        Board Outline TO Part Pads SMD Layer 1    Clearance: 0mm
            No Hazards.

        Route Border TO Via Pads Layer 2    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Holes Layer 2    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Pads Layer 2    Clearance: 0mm
            No Hazards.

        Route Border TO Via Pads Layer 3    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Holes Layer 3    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Pads Layer 3    Clearance: 0mm
            No Hazards.

        Route Border TO Via Pads Layer 4    Clearance: 0mm
            No Hazards.

        Part Pads SMD Layer 4 TO Route Border    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Holes Layer 4    Clearance: 0mm
            No Hazards.

        Board Outline TO Via Pads Layer 4    Clearance: 0mm
            No Hazards.

    >>  Board Outline TO Placement Outlines Layer 4    Clearance: 0.254mm
            Hazards Found : 1

        Board Outline TO Part Pads SMD Layer 4    Clearance: 0mm
            No Hazards.


        Total Hazards Found : 2



    Total Proximity Hazards Found : 2




    ----------------------------
    CONNECTIVITY & SPECIAL RULES
    ----------------------------


    Check For Unplaced Parts                      : YES
        No Hazards.


    Check For Missing Parts                       : YES
        No Hazards.


    Check EP Component Hazards                    : YES
        No Hazards.


    Check Trace Hangers                           : YES
        No Hazards.


    Check Trace Loops                             : YES
        No Hazards.


    Check Trace Widths                            : YES
        No Hazards.


    Check Single Point Nets                       : NO


    Check NonPlane Unrouted/Partially Routed Nets : YES
        No Hazards.


    Check Plane Unrouted/Partial Routed Nets      : YES
        No Hazards.


    Check Routed Plane Pins                       : YES
        No Hazards.


    Check Plane Islands                           : YES
        No Hazards.


    Check Dangling Vias/Jumpers                   : YES
        No Hazards.


    Check Unrouted Pins                           : YES
        No Hazards.


    Check Routed Non-Plated Pins                  : YES
        No Hazards.


    Check Minimum Annular Ring                    : NO


    Check For Vias Under SMD Pads                 : YES
        No Hazards.


    Check For Vias Under Top Place Outlines       : NO


    Check For Vias Under Bottom Place Outlines    : NO


    Check For Missing Conductive Pads             : All Pads / All Layers
        No Hazards.


    Check For Missing Part Soldermask Pads        : NO


    Check For Missing Via Soldermask Pads         : NO


    Check For Missing Solderpaste Pads            : NO



    Total Connectivity/SpecialRules Hazards Found : 0



    ====================================================================



    Total DRC Hazards Found : 2



                         10:09 AM Wednesday, February 05, 2014