HDMI Test Report

Overall Results:0 of 11 Tests Failed

Test Configuration Details
Device Description
HDMI Specification2.0
HDMI Test TypeTMDS Physical Layer Tests
Test ModeCompliance Mode
Test Session Details
Infiniium SW Version04.50.0008
Infiniium Model NumberDSOX93204A
Infiniium Serial NumberMY53180105
Application SW Version1.99.9027
Debug Mode UsedNo
Probe (Channel 1)Model: 1169A Serial: US44000259 Head: N5380A/B Atten: Not Calibrated, Using Default Atten (2.2029E+000) Skew: Not Calibrated, Using Default Skew
Probe (Channel 2)Model: 1169A Serial: US49412941 Head: N5380A/B Atten: Not Calibrated, Using Default Atten (2.1765E+000) Skew: Not Calibrated, Using Default Skew
Probe (Channel 3)Model: 1169A Serial: US49412951 Head: N5380A/B Atten: Not Calibrated, Using Default Atten (2.2029E+000) Skew: Not Calibrated, Using Default Skew
Probe (Channel 4)Model: 1169A Serial: US49413460 Head: N5380A/B Atten: Not Calibrated, Using Default Atten (2.0148E+000) Skew: Not Calibrated, Using Default Skew
Last Test Date2013-09-12 16:46:43 UTC -07:00

Summary of Results

Margin Thresholds
Warning< 2 %
Critical< 0 %

Pass# Failed# TrialsTest NameActual ValueMarginSpec Range
01HF1-7: Clock Jitter (TP2_EQ with Worst Case Skew +112ps)114 mTbit62.0 % VALUE <= 300 mTbit
01HF1-7: Clock Jitter (TP2_EQ with Worst Case Skew -112ps)121 mTbit59.7 % VALUE <= 300 mTbit
01HF1-2: Clock Rise Time123.451 ps64.6 % VALUE >= 75.000 ps
01HF1-2: Clock Fall Time126.550 ps68.7 % VALUE >= 75.000 ps
01HF1-6: Clock Duty Cycle(Minimum)49.94024.9 % >=40%
01HF1-6: Clock Duty Cycle(Maximum)50.25016.3 % <=60%
01HF1-8: D0 Mask Test (TP2_EQ)0.00050.0 % No Mask Failures
01HF1-8: D0 Mask Test (TP2_EQ with Worst Case Skew +112ps)0.00050.0 % No Mask Failures
01HF1-8: D0 Mask Test (TP2_EQ with Worst Case Skew -112ps)0.00050.0 % No Mask Failures
01HF1-2: D0 Rise Time81.215 ps91.1 % VALUE >= 42.500 ps
01HF1-2: D0 Fall Time73.142 ps72.1 % VALUE >= 42.500 ps


Report Detail


HF1-7: Clock Jitter (TP2_EQ with Worst Case Skew +112ps) Reference: Test ID HF1-7
Test Summary: Pass Test Description: 2 Channels Connection Model: TMDS differential clock jitter must not exceed 0.3*Tbit, relative to the ideal Recovery Clock. For compliance, the DUT should output > 340MHz for testing.
Test Limits:<= 300 mTbitClock Jitter114 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming C 3TP1 Differential Swing (V)793 mTest Frequency(MHz)148.498# Edges16.000000000 MTbit(ps)168.353Clock Jitter(ps)19.270Transfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_p.tf4
Trial 1
Trial 1: Clock Jitter

HF1-7: Clock Jitter (TP2_EQ with Worst Case Skew -112ps) Reference: Test ID HF1-7
Test Summary: Pass Test Description: 2 Channels Connection Model: TMDS differential clock jitter must not exceed 0.3*Tbit, relative to the ideal Recovery Clock. For compliance, the DUT should output > 340MHz for testing.
Test Limits:<= 300 mTbitClock Jitter121 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming C 3TP1 Differential Swing (V)793 mTest Frequency(MHz)148.498# Edges16.000000000 MTbit(ps)168.353Clock Jitter(ps)20.400Transfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Clock Jitter

HF1-2: Clock Rise Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: 2 Channels Connection Model: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Test Limits:>= 75.000 psRaw Clock Transition Time123.451 ps
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Test Frequency(MHz)148.498Upper Threshold(%)80.000Lower Threshold(%)20.000# Edges11.000000 kTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Raw Clock Transition Time

HF1-2: Clock Fall Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: 2 Channels Connection Model: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Test Limits:>= 75.000 psRaw Clock Transition Time126.550 ps
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Test Frequency(MHz)148.498Upper Threshold(%)80.000Lower Threshold(%)20.000# Edges11.000000 kTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Raw Clock Transition Time

HF1-6: Clock Duty Cycle(Minimum) Reference: Test ID HF1-6
Test Summary: Pass Test Description: 2 Channels Connection Model: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Test Limits:>=40%Clock Duty Cycle Minimum49.940
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Test Frequency(MHz)148.498# Edges10.000000 kTdutyMIN(ns)3.363Transfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Clock Duty Cycle Minimum

HF1-6: Clock Duty Cycle(Maximum) Reference: Test ID HF1-6
Test Summary: Pass Test Description: 2 Channels Connection Model:Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Test Limits:<=60%Clock Duty Cycle Maximum50.250
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Test Frequency(MHz)148.498# Edges10.000000 kTdutyMAX(ns)3.384Transfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Clock Duty Cycle Maximum

HF1-8: D0 Mask Test (TP2_EQ) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Test Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Maximum Margin-600 fsMaximum Margin (Vertical)0.000000000000 VEye Width(ps)106.910Eye Height(mV)134.050Data Lane AD0Test Frequency(MHz)148.502Mask Moved(ps)600 m# Acquisitions Point16.000000000 MTbit(ps)168.351RightJitterData(Tbit)366 mLeftJitterData(Tbit)364 mRightJitterData(ps)61.580LeftJitterData(ps)61.200Differential Swing Voltage(V)936 mTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ.tf4
Trial 1
Trial 1: Total # failures

HF1-8: D0 Mask Test (TP2_EQ with Worst Case Skew +112ps) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Test Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Maximum Margin-600 fsMaximum Margin (Vertical)0.000000000000 VEye Width(ps)81.220Eye Height(mV)0.000Data Lane AD0Test Frequency(MHz)148.498Mask Moved(ps)600 m# Acquisitions Point16.000000000 MTbit(ps)168.357RightJitterData(Tbit)518 mLeftJitterData(Tbit)518 mRightJitterData(ps)87.270LeftJitterData(ps)87.270Differential Swing Voltage(V)757 mTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_p.tf4
Trial 1
Trial 1: Total # failures

HF1-8: D0 Mask Test (TP2_EQ with Worst Case Skew -112ps) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Test Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Maximum Margin-600 fsMaximum Margin (Vertical)0.000000000000 VEye Width(ps)78.580Eye Height(mV)0.000Data Lane AD0Test Frequency(MHz)148.504Mask Moved(ps)600 m# Acquisitions Point16.000000000 MTbit(ps)168.354RightJitterData(Tbit)532 mLeftJitterData(Tbit)532 mRightJitterData(ps)89.530LeftJitterData(ps)89.530Differential Swing Voltage(V)754 mTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Total # failures

HF1-2: D0 Rise Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Test Limits:>= 42.500 psTransition Time81.215 ps
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Test Frequency(MHz)148.506Data Lane AD0Upper Threshold(%)80.000Lower Threshold(%)20.000#Edge131.646000 kTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Transition Time

HF1-2: D0 Fall Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Test Limits:>= 42.500 psTransition Time73.142 ps
Result Details:
Result Details
HDMIAutomationConfigTiming C 3Test Frequency(MHz)148.506Data Lane AD0Upper Threshold(%)80.000Lower Threshold(%)20.000#Edge131.637000 kTransfer Function FileC:\ProgramData\Agilent\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_N1080H04_cableembed_equ_skew_n.tf4
Trial 1
Trial 1: Transition Time