#
# Makefile.c - Makefile Templates for C
# author: Kuang-Chun Cheng <kccheng@soliton.com.tw>
#
#

SRC		:= $(wildcard *.c)
OBJ		:= $(patsubst %.c, %.o, $(SRC))
BIN		:= $(patsubst %.o, %,   $(OBJ))
ALL		:= $(BIN)

DEBUG_FLAGS	= -Wall -g -DDEBUG
CC_FLAGS	= -m32
#INCLUDE		= -I../include 
INCLUDE		= -I/usr/include/signametrics

SHELL		= /bin/sh
CC		= gcc $(CC_FLAGS)
CFLAGS		= -O2 $(DEBUG_FLAGS) $(INCLUDE)
#LDFLAGS		= -L../lib -lSMX403X 
LDFLAGS		=  -lSMX403X 
ARFLAGS		=

.SUFFIXES:
.SUFFIXES: .c .o
.PHONY: all check clean install uninstall

all: .depend $(ALL)

$(ALL): Makefile

.depend:
	@echo "make .depend ..."
	-$(CC) -MM $(INCLUDE) $(SRC) > .depend
	@echo "make .depend ... OK"

$(filter %.o, $(OBJ)): %.o: %.c
	$(CC) -c $(CFLAGS) $< -o $@

$(filter %, $(BIN)): %: %.o
	$(CC) $(CFLAGS) $< $(LDFLAGS) -o $@

check:
	@echo "make check ..."
	@echo "make check ... OK"

install:
	@echo "make install ..."
	@echo "make install ... OK"

uninstall:
	@echo "make uninstall ..."
	@echo "make uninstall ... OK"

clean:
	@echo "make clean ..."
	-$(RM) .depend
	-$(RM) $(OBJ)
	-$(RM) $(BIN)
	@echo "make clean ... OK"


include .depend
