HP 16517A 16 Channel, 4 GHz Logic Analyzer High-Speed State and Timing Module

Trace more channels with higher accuracy than ever before in a logic analyzer. The 64K deep memory lets you capture data over many clock cycles while retaining the highest multi-channel accuracy ever in a logic analyzer. Solve your toughest problems with the fastest, most flexible state analysis available.

[ Features ]

Find the Cause of Elusive Problems
Verify the timing of critical edges with 250 ps resolution across up to 40 channels, or 500 ps resolution across up to 80 channels. Use the 1 GSa/s synchronous state analysis to view high-speed data streams across up to 80 channels.
The Ultimate in Timing Resolution and Accuracy
The 250 ps resolution of this analyzer is only part of the story. An innovative approach, using phase-locked loops, keeps the skew between channels to +/- 250 ps.
Precisely Characterize Setup or Hold Times
The 250 ps precision (channel-to-channel skew) allows this logic analyzer to be used in place of an oscilloscope for characterization. The high channel count of a logic analyzer makes this a much more efficient process.
Modularity
HP's modular 16500B family lets you configure your mainframe with the modules you need today, while providing you the flexibility to grow with your evolving digital design needs.

[ Specifications ]

Timing Analysis
Max. Sample Speed:			2 GSa/s full channel; 4 GSa/s, half channel
Channels/Card:				16, full channel, 8, half channel
Max. Channels (5 cards):		80, full channel; 40, half channel		
Memory Depth:				64 K, full channel; 128 K, half channel		
Sample Period Accuracy:			0.005% of sample period
Channel-to-Channel Skew:		250ps, typical
Time Interval Accuracy:	 		+/-(sample period + channel-to-channel skew + 0.01% of time interval reading



Synchronous State Analysis
Max. Sample Speed:	 		1 GSa/s, 2 GSa/s
Channels/Card:				16
Max. Channels (5 cards):		80
Memory Depth:				64 K
Setup/Hold Time:			350/350 ps (with deskew) adjustable with sample placement
Sample Placement with Respect		
to External Clock Edge:			+/-5 ns in 200ps increments (course adjustment)
					+/-250 ps in 50 ps increments (fine adjustment)
Number of Samples/External Clock:	Adjustable in increments of 1,2,4,8,16,32
Max. Sample Rate, with Oversampling:	2GSa/s



Triggering
Sequencer Speed:			500 MHz, maximum
State/Timing Sequence Levels:		4
Pattern Recognizers:			4
Max. Channel Width for Patterns:	16-one card
					32-two cards
					48-three cards
					64-four cards
					80-five cards
Edge Recognizers(Timing only):		2
Max. Channel Width for Edges:		16-one card
					32-two cards
					48-three cards
					64-four cards
					80-five cards
Max. Number of Recognizers at One Time: 4
Timers/Counters:			1 per sequence level



Probes
Input dc Resistance:			100 kOhms, +/-2%
Input Impedance:			500 Ohm typical, at 100 MHz through 1 GHz
Input Capacitance:			0.2 pF and then, through 500 Ohm 3pF
Min. Voltage Swing:			500 mV peak-to-peak
Threshold Range:			+/-5.0 V, adjustable in 10 mV increments

[ Ordering ]

HP 16517A 16 Ch 4 GHz Logic Analyzer High-Speed State and Timing Module Opt ABJ Japan - Japanese localization Opt W03 Convert to standard 3 mo. on-site warranty Opt W30 3 Year Return Repair Service Opt W32 3 Yrs Customer Return Calibration Service Opt W34 3 Yrs Customer Return Stds Compliant Cal Service Opt W50 5 Year Return Repair Service Opt W52 5 Year Cust Return Calibration Service Opt W54 5 Year Standards Compliant Cal Service

[ Key Literature ]