HP 16554A 68-Channel 70 MHz State/250 MHz Timing Logic Analyzer Module w/500k of acquisition memory

The HP 16554A 70 MHz state and 250 MHz timing analysis module offers industry standard state and timing analysis features at an affordable price. With this module, there is no need to connect special probes to view timing activity. All channels perform either state or timing functions. Set up your analyzer to perform simultaneous, fully time-correlated state analysis on some channels and timing analysis on the rest.

[ Features ]

Assign channels to capture state and timing data without moving probes
Advanced trigger macros capture elusive problems
- Both basic and complex state and timing macros are available in the trigger macro library. Macros can be combined to create custom trigger setups.
- Each trigger macro displays a graphic of the measurement and a sentence-like structure to make setting the trigger easy. Set up your trigger in terms of the measurement you want rather than the trigger functions in the logic analyzer.
- Families of trigger macros make it easy to pick out just the trigger macro you need, and avoid the hassle of wading through a long list of triggers to find the one you want. Families of trigger macro measurements include:
  - basic macros, including find anystate n times
  - sequence-dependent macros, including find an n-bit serial pattern
  - time violation macros, including find an event 2 occurring too soon after event 1
Capture up to 204, 1 M deep channels simultaneously
- Each module has 68 channels and 500K memory depth per channel.
- Half-channel timing mode provides up to 1 M memory depth per channel
- Connect three modules together for a maximum of 204 channels.
Enhance troubleshooting with flexible display modes
- Display your state measurements as listings, X-Y chart or state waveforms. Display timing information as a waveform or a listing.
- Markers placed in one display are automatically updated in the other display modes.
- State compare mode does a bit by bit comparison between acquired state data and a reference listing.

[ Specifications ]

Probes
Input Resistance:		100 kOhms +/- 2%
Input Capacitance:		~8 pF
Minimum Voltage Swing:		500 mV peak-to-peak
Threshold Range:		+/- 6.0 V adjustable in 50 mV increments



State Analysis
Setup/Hold Time:		0/3.5ns through 3.5/0 ns adjustable in 500 ps increments
Maximum State Clock Rate:	70 MHz		
Minimum State Clock Width:	3.5 ns
Max. Time Count betw. States:	34 seconds
State Clock Qualifiers:		4



Timing Analysis
Sample Period Accuracy:		0.01% of sample period
Channel to Channel Skew:	2 ns, typical
Time Interval Accuracy:		+/-(sample period + channel-to-channel skew + 0.01% of time  interval reading)
Minimum Detectable Glitch:	3.5 ns
Maximum Timing Speed:		125 MHz, full channel/250 MHz, half channel



Triggering
Sequencer Speed:		70 MHz, maximum
State Sequence Levels:		12
Timing Sequence Levels:		10
Pattern Recognizers:		8
Maximum Occurrence Counter:	1,048,575
Range Recognizers:		2
Range Width:			32 bits each
Timers:				2
Timer Value Range:		400 ns to 500 seconds
Glitch/Edge Recognizers:	2 (timing only)

[ Ordering ]

HP 16554A 500 KSa 70 MHz State/250 MHz Timing Logic Analyzer Module Opt ABJ Japan - Japanese localization Opt W03 Convert to standard 3 mo. on-site warranty Opt W30 3 Yrs of Customer Return Repair Service Opt W32 3 Yrs Customer Return Calibration Service Opt W50 5 Yrs of Customer Return Repair Service Opt W52 5 Yrs Customer Return Calibration Service

[ Key Literature ]

State and Timing Modules for HP Logic Analysis Systems

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[ Assistance ]

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