HP 71603B 3 Gb/s Error Performance Analyzer

Accurately characterize your Gbit systems, devices and components.

The HP 71603B error performance analyzer addresses applications for high speed digital testing up to 3 Gb/s, including R&D and manufacturing test of lightwave components and sub-assemblies; advanced computer technology and high-capacity communication systems.

For transmission systems up to 3 Gb/s, such as datacoms and CATV trunk feeds, the HP 71603B and HP 71603B Option 807 error performance analyzers (3 and 1.5 Gb/s) provide a range of PRBS and user-defined paterns with versatile triggering facilities.

Powerful application software to speed measurement time.

The HP E4543A Q Factor and Eye Contour application software. Designed to simply the characterization of high speed optical communication links, automatically calculating the Q figure of merit.

Adaptable application software for full functional testing.

The HP E4544A OC-192/STM-64 application software automatically constructs SONET/SDH frames for functional test of network elements. Features including error and alarm generation plus CID stressing patterns.

[ Features ]

Frequency range: Pattern generator, error detector 100 MHz to 3 GHz
(extended frequency options are available)
Test patterns: PRBS 2^31 - 1, 2^23 - 1, 2^15 - 1, 2^10 - 1, 2^7 - 1
User-defined (max) 4 Mbit via 3-1/2 inch disk (MS-DOS^® format)
Zero substitution: Pattern length (2^13, 2^11, 2^10, 2^7) - 1 bit
Variable mark density ratio on patterns 2^13, 2^11, 2^10, 2^7
Measurements: Error count/ratio, Errored/error-free intervals
Clock frequency

[ Specifications ]

Except where otherwise stated, the following parameters are warranted 
performance specifications. Parameters described as "typical" or 
"nominal" are supplemental characteristics that provide a useful 
indication of typical, but non-warranted, performance characteristics. 
All specifications are for 0° to 40°C after 30 minutes warm-up.



Pattern Generator Module
The HP 70841B pattern generator module occupies four MMS module slots.


Test patterns

PRBS: 2^31-1, 2^23-1, 2^15-1, 2^10-1, 2^7-1.


Zero substitution/variable mark density test patterns:
8192 bits, based on 2^13-1 PRBS
2048 bits, based on 2^11-1 PRBS
1024 bits, based on 2^10-1 PRBS
128 bits, based on 2^7-1 PRBS.
Zero substitution varies the longest run of zeros up to the pattern 
length, minus one. Variable mark density, sets the ratio of ones to 
total bits to 1/8, 1/4, 1/2, 3/4 and 7/8.


User-defined patterns: Variable length user patterns from 
1 to 4,194,304 bits.


Pattern length resolution:
1 bit, from 1 bit to 32,768 bits
2 bits, from 32,768 to 65,536 bits
4 bits, from 65,536 to 131,072 bits
8 bits, from 131,072 to 262,144 bits
16 bits, from 262,144 to 524,288 bits
32 bits, from 524,288 to 1,048,576 bits
64 bits, from 1,048,576 to 2,097,152 bits
128 bits, from 2,097,152 to 4,194,304 bits.


Alternating patterns: Changes between two equal-length user patterns, 
each up to 2,097,152 bits long in multiples of 128 bits. Changeover 
is synchronous with the end of a pattern, under the control of a 
front-panel key or the auxiliary input.


User-defined pattern load/save: 
Four internal pattern stores and built-in MS-DOS^® compatible 3.5 inch 
floppy disk.


Error add: Single, 1 error in 10n bits where n = 3 to 9.



Signal Inputs and Outputs

Data and Data outputs

Except where stated, specifications are with outputs terminated 
50 ohm to 0 V. Transition times and overshoot are specified for 
0101 pattern, 1 V p-p output amplitude and 0 V high level at 25°C. 


Format: NRZ. 
Polarity: Normal or inverted.
Amplitude: 0.25 to 2 V p-p in 10 mV steps.
High level offset (nominal): From +1 to -3.75 V in 10 mV steps.
Jitter: < 10 ps rms (typical < 5 ps rms). Specified for 2^23-1 PRBS, 
2 V p-p output amplitude, 0 V high level and measured relative to
clock.


Transition times (10% to 90%): < 120 ps (typical).
Preshoot/overshoot: < 15% (typical).
Termination: 0 or -2 V.
Clock/data delay range (nominal): ± 1 ns.
Resolution (nominal): 1 ps.
Interface: dc coupled, 50 ohm, N-type female connectors.



Clock and Clock Outputs

All specifications are for the output terminated 50 ohm to 0 V. 
Transition times and overshoot are specified at 25°C. 


Amplitude (nominal): ECL or 0.5 to 2 V p-p in 10 mV steps.
Offset (nominal): High level from +1 to -3.75 V in 10 mV steps.
Transition times (10% to 90%):

	3 GHz . . . .< 120 ps 
	1 GHz . . . .< 130 ps 
	100 MHz . . .< 1.3 ns


Preshoot/overshoot: < 15% (typical). 
Interface: dc coupled, 50 ohm, N-type female connectors.



Clock Input
Amplitude range: ± 4 dBm.
Return loss: > 10 dB typical.
Interface: ac coupled, 50 ohm, N-typefemale connector.


Alternative clock sources: 
The HP 8665A, 8664A and 8644A synthesized signal generators are 
compatible. Use other clock sources only if their SSB broadband 
noise floor meets the following (for offsets > 10 MHz from the 
carrier in the range 10 MHz to 4 GHz):

   	     Carrier	       Noise floor
    	   frequency	         dBc/Hz

         < 300 MHz . . . . . . . .<-140
           300 MHz to 2 GHz. . . .<-130
         > 2.0 GHz . . . . . . . .<-140



Auxiliary input

Controls thealternating pattern changeover (rear panel).
Pulse width (minimum): 250 ns for clock rate < 500 MHz, 
100 ns for clock rate > 500 MHz.
Interface:  TTL compatible, active low, dc coupled, BNC female connector.



Error inject input

Injects a single error in the transmitted test pattern synchronous 
with rising edge of clock (rear panel).
Pulse width (minimum): 250 ns for clock rate < 500 MHz, 100 ns for 
clock rate > 500 MHz.
Data polarity: normal or inverted.
Interface: TTL compatible, BNC female connector.



Trigger output

Pulse width (nominal): 16 clock periods.
Pulse amplitude (nominal): High is 0 V, low is -0.75 V; output 

terminated 50 ohm to 0 V.
Pulse synchronization (pattern mode): Any n-bit pattern in 
2n-1 PRBS patterns; any bit in user-defined patterns; as the word 
changes in alternating patterns. Pulse synchronization (clock/32 mode): 
Input clock divided by32.
Interface: dc coupled, 50 ohm, N-type female connector.




Error Detector Module

The HP 70842B error detector module complements the HP 70841B 
pattern generator module. It occupies four MMS module slots.


Test patterns

As specified for pattern generator module.



Signal Inputs and Outputs

Data input

Polarity: Normal or inverted.
Data sampling clock edge: Selectable rising or falling edge.
Termination voltage: 0 or -2 V. 
Amplitude (nominal): 0.5 V p-p minimum (typically < 50 mV p-p with 
2^23-1 PRBS at 2.5 Gb/s); 2.0 V p-p maximum.
Range: +1 to -4 V terminated to 0 V; 0 to -4 V terminated to -2 V.
0/1 threshold (nominal): +1 to –3 V, ± 1 mV; manual and automatic modes.
Clock/data delay (nominal): ± 1 ns, 
1 ps resolution; manual and automatic modes.
Return loss: > 10 dB (typical).
Interface: dc coupled, 50 ohm, N-type female connector.


Clock input

Amplitude range: ± 4 dBm.
Return loss: > 10 dB (typical).
Termination voltage: 0 or –2 V.
Interface: dc coupled, 50 ohm, N-type female connector.


Error output

Logical "OR" of all errors in a 16-bit period (rear panel).

Format: RZ, active high.
Amplitude (nominal): High 0 V, low -1.1 V.
Pulse width (nominal): 8 clock periods.
Interface: dc coupled, 50 ohm, BNC female connector.


Error inhibit input

Inhibits the counting of errors for multiples of 16 clock periods 
(rear panel).
Pulse width (minimum): 250 ns for clock rate < 500 MHz, 100 ns for 
clock rate > 500 MHz.
Interface: ECL terminated to –2 V, 50 ohm, BNC female.


Trigger output 
(rear panel).

Pulse: Synchronous with error detector reference pattern.
Format: Active high.
Amplitude (nominal): High 0 V, low –1.1 V.
Pulse width: 16 clock periods nominal.
Interface: dc coupled, 50 ohm, BNC female.


Audible error indicator

Selectable, audible beep, proportional to error ratio (requires 
an MMS display).



Clock Source Module

The HP 70311A clock source module occupies four MMS module slots. 
It provides a variable synthesized clock signal to the pattern 
generator.


Frequency range: 16 MHz to 3.3 GHz in 1 Hz steps.
Stability: ± 2 ppm/year after 1 year aging); ± 6 ppm over 0° to 
40°C (temperature).
Spectral purity (harmonics): < -30 dBc.
SSB phase noise (3.3 GHz carrier):
-75 dBc/Hz at 1 kHz offset; -115 dBc/Hz at 20 kHz offset.
Output level: ± 3 dBm.
Interface: ac coupled, 50 ohm, N typefemale connector.


External reference input
Frequency: 10 MHz ± 1kHz.
Amplitude: 230 mV rms to 2 V rms.
Interface: ac coupled, 50 ohm, SMB male connector (rear panel).

[ Ordering ]

HP 71603B 3 Gb/s Error Performance Analyzer (for 3 Gb/s BER measurement and analysis) HP 71604B 100 Mb/s to 3 Gb/s pattern generator (for pattern generation only) Opt 100 Delete signal generator (clock source) module (For the HP 71604B pattern generator, this option also deletes the HP 70001A MMS mainframe.) Opt 200 Delete HP 15680 RF accessory kit Opt 807 100 Mb/s to 1.5 Gb/s error performance analyzer Opt 814 Frequency range extended to 3.2 Gb/s Opt H50 Frequency range extended to 50 Mb/s Opt Accessories Opt 910 One additional set of operating, verification and installation manuals Opt 908 Rack mount kit for equipment without fronthandles fitted Opt 913 Rack mount kit for equipment with front handles fitted Opt +W30 Two years additional hardware support beyond the standard one-year warranty. HP 15680A RF Accessory Kit (Contains N-type to SMA adapters, terminations, and RF signal cables. It is included with the HP 71600 Series, but may also be ordered separately.) Modules, Displays and Mainframes If you own an MMS display and mainframe, or you wish to build your own test bay, order only the parts you need for your 3 GHz application: HP 70841B Pattern Generator Module HP 70842B Error Detector Module HP 70311A Clock Source Module If you need an MMS display or mainframe, order: HP 70004A Color Display HP 70001A Mainframe Find out how the HP 70000 Series MMS can help you. Consult the Modular Measurement System Solutions and Components Catalog (publication number 5965-2818E) and the Lightwave Test and Measurement Catalog (publication number 5965-5480E). Hewlett-Packard manufactures the HP 70843A analyzer under a quality system approved to the international standard ISO 9002 (BSI Registration Certificate No FM 10987).

All orders include the following:
operating and installation manuals, HP 15680A RF Accessory Kit

Trademarks:
MS-DOS is a U.S. registered trademark of Microsoft Corporation.

[ Key Literature ]