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HP E1613A 6.3 Mb/s (J2) Electrical Line Interface![]()
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The HP E1613A 6.3 Mb/s (J2) Electrical Line Interface generates and analyses ATM cell streams contained within a J2 framing format as used by the user-network interface (UNI) of NTT's ATM Cell Relay service. It is a single-slot module that provides test capability at the physical and ATM cell layers for the HP E4200/E4210 Broadband Series Test System.
The industry-standard HP E4200/E4210 Broadband Series Test System (BSTS) is ideal for R&D engineering, product development, field trials and quality assurance. It supports the widest variety of standard interfaces of speeds up to 622 Mb/s, the broadest, most powerful range of signalling capabilities, the industry's most complete automated conformance test suites, time-savings features for monitoring, emulation, simulation, load generation, performance and automated testing.
Line interface modules can perform physical layer testing with a minimal BSTS configuration consisting of a line interface module and chassis.
Complete range of test software applications and dedicated test modules are available to perform upper layer testing.
Add the HP E4209 Cell Protocol Processor provides monitoring and simulation test functions at the ATM and adaptation layer by executing optional protocol testing software applications. The CPP performs many functions in hardware that are usually done in software -- such as an automatic segmentation and reassembly engine for sophisticated real-time ATM, AAL and other higher layer protocol testing.
The HP E4219A ATM Network Impairment Emulator module lets you find the limits of performance by inserting impairments into an ATM cell stream.
For complete list of BSTS Product Numbers, please refer to the Product Index page.
Modes
Three Tx/Rx modes are available. In Terminal mode, full signal generation and analysis functions are available. In Repeater mode, the received signal is re-transmitted (physical layer loopback). In Local Loopback mode, the transmit signal is electrically looped to the receiver.
ATM Cell Generation
The transmitted cell stream can contain ATM cells generated by the HP E1613A and ATM cells generated by an optional HP E4209 Cell Protocol Processor module. ATM cells generated on-board can consist of one foreground channel to stimulate the channel under test, and up to one hundred background channels for loading purposes. Fill cells are used to occupy unused bandwidth. Total Bandwidth 6.144 Mb/s Modes User-Network Interface (UNI) or Network-Node Interface (NNI) HEC Automatic generation Fill Cells Idle or unassigned Channel Priority Order OAM Fault-Management cells, Foreground, background, CPP (highest to lowest priority) Channel Control VCI VPI GFC Payload Type Cell Loss Priority SAR-PDU Support AAL-0 AAL-1
Foreground Channel
Bandwidth 100 b/s to 6.144 Mb/s Accuracy ±0.02 ppm Distribution Off Single burst Periodic (according to the specified bandwidth) Channel Depth 1500 cells (variable) Cell Payload Timestamp Single cell PRBS Cross cell PRBS Data pattern Byte access
Background Channels
Number of Channels Up to 100 Bandwidth 3 kb/s to 6.144 Mb/s Accuracy ±10 ppm Distribution Off Periodic Channel Density Bandwidth and cell distribution for each background channel is individually assignable up to maximum bandwidth Channel Depth 16 cells Cell Payload Single cell PRBS Data pattern Byte access
Cell Payloads
Payloads Timestamp (32-bit departure timestamp value with 100 nanosecond resolution) Cross cell PRBS-9 PRBS-15 (inverted and not inverted) PRBS-23 Single cell PRBS-9 Data pattern or byte access Data Patterns User byte AA55h or FF00h Incrementing (value of each successive byte is incremented by 1) Byte Access Payload of all cells in the selected channel can be edited by the user in an active channel environment, or off-line as a sequence of PDUs AAL-1 automatically inserts first payload byte containing SN/SNP values and CSI bit
ATM Erroring Control
Error conditions can be introduced to simulate alarm signals and signal stressing. Error stressing is used to generate incorrect bytes in a test signal. Error Stressing Control Off On Pulse On (error condition is normally off; pulses on) Pulse off (normally on; pulses off) Sequence On (normally off; alternates on/off/on) Sequence Off(normally on; alternates off/on/off) ATM Error Injection Cell header or payload bytes with bit error masking Cell Loss Sequence Number in the SAR-PDU is skipped and a fill cell is inserted PRBS Error Add Single bit error add to the PRBS pattern in the cell payload OAM Fault Management VP/VC-AIS and FERF cells transmitted at a rate of one per 0.2 to 10 seconds continuously or in bursts of 1 to 63 F4 or F5 level Segment and end-to-end OAM flows are supported Payload octets 2 to 46 can be edited Bit error maskingon payload octets 2 to 48
G.704 Frame Stressing
Alarm Generation AIS RAI Error Injection FAS CRC-5 Overhead Stressing a-bit (0 or 1) x-bits (individually 0 or 1)
ATM and G.704 Frame Measurements
Measurements are sampled every 100 milliseconds and accumulated over the user-specified measurement period. Results from the most recent complete measurement period are retained. Measurement Period Range 1 second to 3 days in resolutions of 1 second Result Types Cumulative or latched (based on most recent measurement period) Result Formats Count Ratio Seconds ATM Cell Measurements HEC errors Corrected headers Cell count Cell bandwidth Select Cell Not Received (SCNR)alarm seconds Cell Delay Measurements Cell delay Inter-arrival time Cell delay variation Virtual Channel Errors AAL-1 SN/SNP errors Cell loss PRBS errors PRBS sync loss alarm seconds OAM Cell Measurements OAM cell count VP-AIS alarm seconds VP-FERF alarm seconds VC-AIS alarm seconds VC-FERF alarm seconds CRC-10 errors G.704 Measurements Coding violation errors CRC-5 errors FAS errors Loss of signal alarm seconds Loss of frame alarm seconds AIS alarm seconds RAI alarm seconds Frame count
ATM Capture
Provides capture of 1500 cells from the selected ATM cell stream. Capture is manual or event triggered. Manual triggering captures 1500 cells after the trigger. Event triggering captures 749 cells pre-trigger, 1 trigger cell, and 750 cells post-trigger. Manual Triggered on user request ATM Cell Triggers Cell loss Header error PRBS error SN/SNP byte error
Frame Capture
Provides capture of 2048 G.704 frame payloads (octets 1-98) Trigger Manually-triggered
Applicable Standards
ATM Cells: ITU-T Recommendation I.361 1995 B-ISDN ATM layer specification Bellcore TA-NWT-001113 1993 Asynchronous Transfer Mode and ATM Adaptation Layer (AAL) Protocols Generic Requirements SONET/SDH: SDH as per ITU-T G.708 and I.361 for BSTS software releases prior to version A.10 SDH as per ITU-T G.707 (draft) COM 15-163-E July 1995 Draft revised ITU-T recommendation G.707 network node interface for the synchronous digital hierarcy (SDH) for software releases A.10 and later SONET as per Bellcore TA-NWT-000253 for BSTS software releases prior to version A.10 SONET as specified by Bellcore GR-253-CORE Synchronous Optical Network (SONET) Transport Systems: Common Generic Criteria for software releases A.10 and later PRBS Patterns: PRBS-9 as per ITU-T 0.153 1992 PRBS-23 as per ITU-T 0.151 1992 EMC: CISPR11, Class A
HP E1613A 6.3 Mb/s (J2) Electrical Line InterfacAll orders include the following:Requirements: Base system requirements: HP E4200A/B HP Broadband Series Test System Form 7 Transportable Base or HP E4210A/B HP Broadband Series Test System Form 13 Mainframe Base HP E4209A/B Cell Protocol Processor HP E4219A ATM Network Impairment Emulator
User's Guide Programmer's Guide Product Release Notice
HP E1613A 6.3 Mb/s (J2) Electrical Line Interface
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Page Updated: Thursday November 12 21:44:36 UTC 1998