HP E2444A Intel i386DX Preprocessor Interface

Product Summary

The Intel i386 DX preprocessor has three modes of operation. In state-per-bus mode, address and data are aligned and captured on the same state. All unnecessary wait and idle states are filtered out. Both pipelined and non-pipelined modes are supported. All queue flush instructions are marked.

In state-per-clock mode, address and data are captured on each CPU clock. This feature is useful in debugging system crashes.

In timing mode, all active buffers are tri-stated and data is sampled every 4 ns. This feature is used when accurate timing measurements are desired.

Product Features

• Supports the following CPU operations:
  • Memory Read/Write
  • I/O
  • Read/Write
  • Opcode Fetch
  • Interrupt Acknowledge Type 0-255
  • Halt
  • Shutdown
  • 80287/80387 Coprocessor Operations
  • Register and Bus Sizes 16 and 32.
• Synchronized disassembly at branch addresses.
• Identifies and marks queue flush and unexecuted pre-fetched instructions are for all bus sizes; FPU instructions are decoded in the display.
• Allows you to control amount of information sent to the logic analyzer for improved trace readability.

Product Specifications

Microprocessor Compatibility
Intel i386 132-pin PGA, 25 and 33 MHz

Logic Analyzers Supported
HP 1650, 1652, 1654
HP 16510B, 16511B
HP 16540 A/D and 16541 A/D
HP 16542 
HP 16554A, 16555A, 16556A
HP 1660C, 1661C, 1662C, 1663C, 1664C

Pods Required
Five, 16-channel pods are required for complete state disassembly. 

Adapters
All terminations are mounted on the pod; no termination adapters are required.

Signal Line Loading
15 pF on ADS and READY
8 pF on all other channels

Product Ordering Information

HP E2444A	Intel i386DX Preprocessor Interface

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All orders include the following:

Configuration software

Inverse assembler

To help you make the right instrument choices

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