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HP E2445A User-Definable Preprocessor Interface |
The user-definable interface provides the basic equipment required to create a custom interface between a wide variety of target systems and HP logic analyzers. With this product, the user can quickly design and build an interface which will utilize the full data acquisition and analysis capabilities of the logic analyzers.
The user-defined interface operates with two data sampling types. In the state-per-bus and state-per-clock modes, adequate space is provided for the user to include sufficient active and passive circuitry to generate the appropriate clock for state analysis measurements.
In timing mode, a total of 96 signals may be monitored by a timing analyzer.
1 GHz timing termination adapters are required for this mode.
Microprocessor Compatibility
Any microprocessor that has a total number of data, address and status lines equal to or less than 96 should be able to be analyzed. Bus speed is limited to the maximum bus speed of the analyzer being used.Logic Analyzers Supported
HP 1650, 1652, 1654 HP 16510B, 16511B HP 16540 A/D and 16541A/D HP 16542 HP 16554A, 16555A, 16556A HP 1660C, 1661C, 1662C, 1663C, 1664CPods Required
Up to six 16-channel pods can be used.Adapters
Three of the connectors are terminated on the pod. Six additional connectors are unterminated; 1 GHz timing termination adapters may be purchased separately if needed.Maximum Signal Input
+/- 40 V maximum. Threshold ranges vary, depending on the logic analyzer used.
HP E2445A User Definable InterfaceHP E2445A User-Definable InterfaceHP 10321A Hardware Interface Parts Kit HP 10322A 40 pin DIP Interface Cable Kit HP 10323A 48 pin DIP Interface Cable Kit HP 10324A 64 pin DIP Interface Cable Kit HP 10391B Inverse Assembler Development Software Package HP 01650-63203 100 KOhm Termination Adapter HP E3417A General Purpose 132 pin QFP Probe Adapter 3M 3303-0000 Basic Breadboard Kit (with socket and insertion tools)
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Configuration software
Page Updated: Thursday June 19 16:13:59 UTC 1997