HP E2910A PCI Bus Exerciser

The HP E2910A PCI Bus Exerciser provides you with a powerful tool to accelerate the development of PCI devices and systems significantly, and ensure exhaustive verification at the earliest opportunity. From bring-up and debug of individual devices through integration to in-system validation, use this independent, controllable agent on the bus to:

Emulate missing device traffic for concurrent development
Generate protocol corner-cases & exceptions to verify thoroughly
Record, replay and modify real traffic to reproduce critical cases and isolate the root cause of real problems faster

[ Features ]

Supports all PCI transactions, including reserved commands as Master or Target
Complete control over:
- Wait cycles
- Burst length
- Abort/Retry
- Parity and error reporting
PCI protocol participation from 0 to 33 MHz
Continuous, real-time monitoring detects protocol violations
Real-time test sequencer with pattern recognizer allowing triggering/branching on:
- All bus signals
- Bus states
- Protocol violations
Software integrates HP logic analyzer to capture bus traffic
Hierarchical disassemblers for easy high-level analysis of captured traffic
Record, edit & replay of PCI transactions
Fixturing available for 32/64 Bit PCI in-system test and add-in card test
MS Windows^® based user interface

[ Specifications ]

User Interface

The HP E2910A software runs on the PC under MS Windows 3.1 and is intuitively oriented around the test flow, from test set-up through to analysis of captured bus traffic. All set-up and data files are stored in ASCII format so you can easily manipulate them with other applications and programs.

Transaction Memory

Master or target transactions are constructed from address and data phases, up to a maximum burst of 1,750 phases for a single transaction. In each phase you can define the protocol variations, such as command type (including reserved)/Byte enables, address/data, wait cycles, parity calculation, parity and error reporting, aborts, disconnects, back-to-back transfer, locked transfer and REQ between transactions. Multiple transactions can be defined up to the maximum memory depth of 13,750 phases.

Test Sequencer

The test sequencer is located on an ISA card and plugs into the PC running the HP E2910A software. You can generate sequences of bus transactions with triggering/branching on up to seven bus patterns or the external trigger input.

Protocol Monitor

Dedicated state-machine hardware monitors PCI protocol rules continuously in real-time. Violations can be used to trigger/branch the logic analyzer, or the exerciser's traffic sequence.

PCI traffic analysis

The HP E2910A software analyses up to 4k states from the logic analyzer, providing state and transaction disassembly as well as clearly identifying protocol errors and interpreting the content of PCI configuration cycles. Disassembled transactions can be modified and replayed by the exerciser. To capture the PCI bus traffic for analysis, the HP E2910A requires an HP 16500B Logic Analysis frame with 1655xA Logic Analyzer cards. For 32 Bit PCI you require one 16550A card or two 16554/5/6A cards, for 64 Bit PCI two 16550A cards or three 16554/5/6A cards.

PCI Fixturing

In-system adapters: adapt the HP E2910A to a PCI slot. For 5 V signalling select the HP E2911A, for 3.3 V signalling the HP E2913A. Stand-alone Card Adapters: adapt the HP E2910A to provide 3 PCI slots and a PCI arbiter for testing cards independent of a system board. For 5 V signalling select the HP E2912A, for 3.3 V signalling the HP E2914A.

[ Ordering ]

HP E2910A PCI Bus Exerciser HP E2911A 5V PCI In-system Adapter 0CC SW-Update HP E2912A 5V PCI Stand-alone Adapter HP E2913A 3.3 V PCI In-system Adapter HP E2914A 3.3 V PCI Stand-alone Adapter To use the HP E2910A PCI Bus Exerciser, the following additional equipment is required: Computer PC: IBM-PC or 100% compatible with recommended minimum 66 MHz 486 CPU and 3.5" floppy drive. Graphics: 640 x 480 VGA minimum. 1024 x 768 SVGA recommended. O/S: MS-DOS^® version 5.0 with Windows 3.1 required. Memory: 16MB minimum,24MB recommended. Hard Disk: Minimum 50MB available disk space required, 100MB recommended. Expansion Slots: 2 ISA slots required for test sequencer card and HP-IB card. I/O Interface: HP-IB interface card supplied with HP E2910A requires ISA slot in PC. Logic Analyzer HP 16500A/B Logic Analyzer System Mainframe with HP 16550A logic analyzer cards(s): 32 Bit PCI: One HP 16650A card required. To monitor sideband signals, or target and master states asecond card is required. 64 Bit PCI: Two HP 16550A cards are always required.

Trademarks:
Windows and MS-DOS are U.S. registered trademarks of Microsoft Corp.

[ Key Literature ]

Tech. Data Sheet (221KB)

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[ Assistance ]

To help you make the right instrument choices

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[ Related ]

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