HP E4203A 155 Mb/s Protocol Line Interface

The HP E4203A Protocol Line Interface is a physical line interface implemented in a single-slot VXI module for the modular HP Broadband Series Test System. It transmits and receives data at STS-3c/STM-1 rates and performs physical layer testing.

The HP E4203A LIF can measure and display, in both tabular and graphical form. These real-time statistics are possible: B2 BIP line errors, B3 BIP path errors, Z1 FEBE line errors, G1 FEBE path errors, corrected header errors, and uncorrected header errors.

The HP E4203A provides physical layer connectivity; however, access to a rich ATM test environment is available when it is used in conjunction with companion BSTS modules. Two of these companions are the E4209 Cell Protocol Processor (CPP) and the E4219 Network Impairment Emulator (NEM).

The HP E4209 Cell Protocol Processor (CPP) provides monitoring and simulation test functions at the ATM and adaptation layers by executing optional protocol testingsoftware applications. The CPP performs many functions in hardware that are usually done in software -- such as an automatic segmentation and reassembly engine for sophisticated real-time ATM, AAL and other higher layer protocol testing.

The E4219 ATM NEM lets you find the limits of performance by inserting impairments into an ATM cell stream.

The industry-standard HP E4200/E4210 Broadband Series Test System (BSTS) is ideal for R&D engineering, product development, field trials and quality assurance. It supports the widest variety of standard interfaces of speeds up to 622 Mb/s, the broadest, most powerful range of signalling capabilities, the industry's most complete automated conformance test suites, time-savings features for monitoring, emulation, simulation, load generation, performance and automated testing.

Line interface modules can perform physical layer testing with a minimal BSTS configuration consisting of a line interface moduleand chassis.

Complete range of test software applications and dedicated test modules are available to perform upper layer testing.

Add the HP E4209 Cell Protocol Processor provides monitoring and simulation test functions at the ATM and adaptation layer by executing optional protocol testing software applications. The CPP performs many functions in hardware that are usually done in software -- such as an automatic segmentation and reassembly engine for sophisticated real-time ATM, AAL and other higher layer protocol testing.

The HP E4219A ATM Network Impairment Emulator module lets you find the limits of performance by inserting impairments into an ATM cell stream.

For complete list of BSTS Product Numbers, please refer to the Product Index page.

• Cell based implementation
• Optical line interface that generates at STS-3C/STM-1 rates
• Provides access to 576 Kb/s Date Communications Channel (DCC)
• Provides physical layer measurements as well as error generation
• Works with Cell Protocol Processor

Modes
Three Tx/Rx modes are available. In Terminal mode, full signal 
generation and analysis functions are available. In Repeater mode, 
the received signal is re-transmitted (physical layer loopback). In 
Local Loopback mode, the transmit signal is electrically looped to 
the receiver.


Real-Time Statistics
The E4203A LIF can measure and display, in both tabular and
graphical form, the following statistics:
B2 BIP line errors
B3 BIP path errors
Z1 FEBE line errors
G1 FEBE path errors
Corrected header errors
Uncorrected header errors


Input & Output Connectors

Optical Input
OC-3 optical receiver
FC/PC connector with a minimum input power saturation of -6 dBm

Optical Output                   
OC-3 optical transmitter
FC/PC connector with an intermediate reach transmitter (1310 nm)
Average output power -13 dBm to -8dBm

DCC Ports
Connector as specified in ITU-T
Recommendation "Modems for synchronous data transmission using 
60-108 kHz group band circuits," Blue Book Fasc. VIII.1, November, 1998

External Clock Input
BNC connector
Nominal 50 ohm impedance
1 V peak-to-peak


LED Status Indicators

Failed
Self test indicator

Gating
Indicates when a measurement is in progress

Access
Indicates when the module is being addressed

LOS
Indicates loss of signal

OOF
Indicates when SONET/SDH is out of frame

LOCS
Indicates that cells are out of cell synchronization

Laser
Indicates that the transmitter laser has been enabled

HP E4203A     155 Mb/s Protocol Line Interface


Requirements:

Base system requirement:
HP E4200A/B     HP Broadband Series Test System Form 7 Transportable Base
or
HP E4210A/B     HP Broadband Series Test System Form 13 Mainframe Base

HP E4209A/B     Cell Protocol Processor
HP E4219A       ATM Network Impairment Emulator

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Related product families available online:

Broadband Series Test System
Broadband/ATM

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