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HP Versatest V1200 Mixed Memory/Logic IC Test System | |||
![[ Summary ]](../Graphics/tab-summary.gif)
![[ Features ]](../Graphics/tab-features.gif)
![[ Specifications ]](../Graphics/tab-specs.gif)
![[ Ordering ]](../Graphics/tab-ordering.gif)
The HP V1200 is a high-throughput, low-cost test solution that features eight fully independent sets of test resources for testing up to 64 devices in parallel. HP's Tester Per Site architecture combined with sophisticated algorithmic sequencing and timing architecture makes the HP V1200 an ideal sort solution for flash and other non-volatile memory.
The HP V1200 offers flexible test solutions for a variety of devices including:
Flash, EEPROM, EPROM, Mask ROM, Serial Access,
EPLD, Microcontrollers, Memory Cards, FPGA, and SRAM
Completely independent test resources at each site
Resources include PMU, APG, vector RAM, and test site controller
Formatting Capabilities
All typical drive and compare formats including per-pin format
selection on the fly
Timing Capabilities
Data rate: 10 MHz with 256k APG
Period selection: On the fly
Overall timing accuracy: ±15 ns
Buffer Memory/Error Catch RAM (Optional)
Capacity: 32 Mbits or 128 Mbits
Data Bus Width: 8 bits or 16 bits selectable
Facilities Requirements
System floor space excluding cooling and service clearance:
9.94 sq. feet (0.932 sq. meters)
Typical power consumption: 30 A rms @ 220 V single phase
HP V1200 Mixed Memory/Logic IC Test System For configuration information and quotation assistance, please contact your local Hewlett-Packard semiconductor test specialist.
Trademarks:
Windows NT is a U.S. registered trademark of Microsoft Corp.
UNIX is a registered trademark in the United States and other countries, licensed exclusively through X/Open Company Limited.
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Page Updated: Tuesday July 01 17:42:58 UTC 1997