Zigbee Module Examples

- Main Page
- Related Pages
- Modules
- Data Structures
- Files

- File List
- Globals

All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Macros | Functions
hal_msp430x2xxx_oscillators.h File Reference

public methods and macros for hal_msp430x2xxx_oscillators.c More...

`#include <stdint.h>`

## Macros
#define | XTAL 8000000L
#define | TICKS_PER_MS (XTAL / 1000)
#define | HAL_DELAY_MS(halMsec) for (int i = halMsec; i; i--) for (int j = TICKS_PER_MS; j; j--)
#define | HAL_DISABLE_WDT() (WDTCTL = WDTPW + WDTHOLD)
#define | HAL_WDT_ENABLE_ACLK_32K() (WDTCTL = WDTPW+WDTCNTCL+WDTSSEL)
#define | HAL_WDT_RESET HAL_WDT_ENABLE_ACLK_32K
#define | VLO_NOMINAL 12000
#define | VLO_MIN (VLO_NOMINAL - (VLO_NOMINAL >> 2))
#define | VLO_MAX (VLO_NOMINAL + (VLO_NOMINAL >> 2))
#define | HAL_OSCILLATOR_CONFIGURE_MAIN_DCO_1MHZ()
#define | HAL_OSCILLATOR_CONFIGURE_MAIN_DCO_8MHZ()
#define | HAL_OSCILLATOR_CONFIGURE_MAIN_XTAL_8MHZ()
#define | HAL_OSCILLATOR_CONFIGURE_AUX_VLO() BCSCTL3 = LFXT1S_2
#define | HAL_OSCILLATOR_CONFIGURE_AUX_XTAL_32KHZ() BCSCTL3 = (LFXT1S_0 + XCAP_3)
#define | HAL_OSCILLATOR_CONFIGURE_AUX_EXT_32KHZ() BCSCTL3 = LFXT1S_3
#define | HAL_OSCILLATOR_CONFIGURE_AUX_DIVIDE_BY_4() BCSCTL1 |= DIVA_2
#define | HAL_SYSTICK_INTERVAL_MS 250

## Functions
int16_t | halCalibrateVlo ()
uint16_t | halMeasureAclkFrequency ()

## Detailed Description

public methods and macros for hal_msp430x2xxx_oscillators.c

Rev:
  1528

Author:
  dsmith

Date:
  2012-08-30 15:58:08 -0700 (Thu, 30 Aug 2012)

# Support

Please refer to the wiki at www.anaren.com/air-wiki-zigbee for more information. Additional support is available via email at the following addresses:

- Questions on how to use the product: AIR@a.nosp@m.nare.nosp@m.n.com
- Feature requests, comments, and improvements: featu.nosp@m.rere.nosp@m.quest.nosp@m.s@te.nosp@m.slaco.nosp@m.ntro.nosp@m.ls.co.nosp@m.m
- Consulting engagements: sales.nosp@m.@tes.nosp@m.lacon.nosp@m.trol.nosp@m.s.com

# License

Copyright (c) 2012 Tesla Controls. All rights reserved. This Software may only be used with an Anaren A2530E24AZ1, A2530E24CZ1, A2530R24AZ1, or A2530R24CZ1 module. Redistribution and use in source and binary forms, with or without modification, are subject to the Software License Agreement in the file "anaren_eula.txt"

YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL ANAREN MICROWAVE OR TESLA CONTROLS BE LIABLE OR OBLIGATED UNDER CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSE INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.

## Macro Definition Documentation

#define HAL_OSCILLATOR_CONFIGURE_AUX_DIVIDE_BY_4 | ( |  | ) | BCSCTL1 |= DIVA_2

Configure ACLK to be one fourth of the ACLK clock source

#define HAL_OSCILLATOR_CONFIGURE_AUX_EXT_32KHZ | ( |  | ) | BCSCTL3 = LFXT1S_3

Configure ACLK Oscilator to use an external 32kHz oscillator input. Requires an external 32kHz oscillator.

#define HAL_OSCILLATOR_CONFIGURE_AUX_VLO | ( |  | ) | BCSCTL3 = LFXT1S_2

Feel free to add additional oscillator configuration #defines here Configure ACLK Oscilator to use VLO. Note: you must calibrate VLO!

#define HAL_OSCILLATOR_CONFIGURE_AUX_XTAL_32KHZ | ( |  | ) | BCSCTL3 = (LFXT1S_0 + XCAP_3)

Configure ACLK Oscilator to use an external 32kHz XTAL. Requires an external 32kHz xtal.

#define HAL_OSCILLATOR_CONFIGURE_MAIN_DCO_1MHZ | ( |  | ) |

Value:
if (CALBC1_1MHZ ==0xFF || CALBC1_1MHZ == 0xFF) \
while(1); \
BCSCTL1 = CALBC1_1MHZ; DCOCTL = CALDCO_1MHZ; BCSCTL2 = 0

Main clock of 1MHz by DCO, SMCLK of 1MHz. Note: SMCLK of 1MHz is incompatible with many other library functions, like hal_flash_write.

#define HAL_OSCILLATOR_CONFIGURE_MAIN_DCO_8MHZ | ( |  | ) |

Value:
if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF) \
while(1); \
BCSCTL1 = CALBC1_8MHZ; DCOCTL = CALDCO_8MHZ; BCSCTL2 = DIVS_1

Main clock of 8MHz by DCO, SMCLK of 4MHz

#define HAL_OSCILLATOR_CONFIGURE_MAIN_XTAL_8MHZ | ( |  | ) |

Value:
BCSCTL1 &= ~XT2OFF; BCSCTL3 |= XT2S_2; \
do { IFG1 &= ~OFIFG; for (unsigned int i = 0xFFFF; i > 0; i--); } \
while (IFG1 & OFIFG); \
BCSCTL2 = (SELM_2 + DIVM_1 + SELS + DIVS_1)

Main clock of 8MHz by XTAL, SMCLK of 4MHz. Requires an external 8MHz xtal.

## Function Documentation

int16_t halCalibrateVlo | ( |  | ) |

    Calibrate VLO. Once this is done, the VLO can be used semi-accurately for timers etc.

Once calibrated, VLO is within ~2% of actual when using a 1% calibrated DCO frequency and temperature and supply voltage remain unchanged.

Returns:
  VLO frequency (number of VLO counts in 1sec), or -1 if out of range

Precondition:
  SMCLK is 4MHz
  MCLK is 8MHz
  ACLK sourced by VLO (BCSCTL3 = LFXT1S_2 in MSP430F2xxx)

Note:
  Calibration is only as good as MCLK source. Obviously, if using the internal DCO (+/- 1%) then this value will only be as good as +/- 1%. YMMV.
  On MSP430F248 or MSP430F22x2 or MSP430F22x4, must use TACCR2. On MSP430F20x2, must use TACCR0. On MSP430G2553, must use CCI0B on CCR0 Check device-specific datasheet to see which module block has ACLK as a compare input. Modify TACCTLx, TACCRx, and CCIS_x accordingly For example, see page 23 of the MSP430F24x datasheet or page 17 of the MSP430F20x2 datasheet, or page 18 of the MSP430F22x4 datasheet.
  If application will require accuracy over change in temperature or supply voltage, recommend calibrating VLO more often.

Postcondition:
  Timer A settings restored to what they were beforehand except for TACCR0 which is reset.

uint16_t halMeasureAclkFrequency | ( |  | ) |

    Measure ACLK clock source frequency using main clock. Ignores ACLK Divide settings (DIVA bits in BCSCTL1)

Returns:
  ACLK frequency (number of ACLK counts in 1sec)

Precondition:
  SMCLK is 4MHz
  MCLK is 8MHz

Note:
  on MSP430F248 or MSP430F22x2 or MSP430F22x4, must use TACCR2. On MSP430F20x2, must use TACCR0. Check device-specific datasheet to see which module block has ACLK as a compare input. For example, see page 23 of the MSP430F24x datasheet or page 17 of the MSP430F20x2 datasheet, or page 18 of the MSP430F22x4 datasheet.

Postcondition:
  Timer A settings changed
  WDT disabled
  ACLK divide by 8 bit cleared