1. c. The VCO Output Frequency (Fout) is the output of the whole system, which is controlled by the PLL.














  2. h. The Crystal Reference Frequency (Fosc) is a fixed frequency. It can be provided by a TCXO (Temperature Compensated Crystal Oscillator) or a crystal.













  3. a. The Comparison Frequency (Fcomp) can be thought of as the tuning resolution, for an integer PLL. As N is changed by 1, the output changes in increments of Fcomp.













  4. b. The R Counter Value divides the fixed crystal reference frequency by R to get the comparison frequency. R is usually fixed for a given application.













  5. e. The N Counter Value multiplies the comparison frequency in order to get the output frequency.













  6. d. The Phase/Frequency Detector detects differences in input signals, phase error between 2 input signals, frequency error between 2 input signals and outputs a voltage to the charge pump.













  7. g. The Loop Filter is a Low Pass Filter













  8. f. The Voltage Controlled Oscillator (VCO) is a Voltage to frequency converter - often NOT integrated with the rest of the PLL














  • It influences switching time, loop bandwidth and reference spurs.
    Refer to: 
    "Loop Filter" slide from PLL Building Blocks presentation

 

 





 

From the slide called "Basic PLL Operation", Fout = Fosc*N/R. Therefore, N/R = Fout/Fosc = 770MHz/10MHz = 77/1. This implies that N=77 and R=1 is a valid solution to this equation. Now because Fosc/R = Fcomp and Fosc is fixed, the maximum value for Fcomp corresponds to the lowest possible value for R.

In this case, this would imply R=1 and Fcomp=10000 kHz. However, this disregards any constraints imposed by prescalers. Now it is necessary to confirm that 77 is a legal divide ratio for a 64/65 presclaer. From the slide on "Determining the N Counter Value", we see that B >= A is required for proper operation. For N=77, we calculate B = 77 div 64 = 1, and A = 77 mod 64 = 13. Since B < A, this value is illegal. Now of both N and R are multiplied by the same number, their ratio is the same, but this helps with illegal divide ratios.

Below is a table showing how to do this ...

Fosc

Fout

N

R

B

A

Fcomp

Legal Divide
Ratio (B>=A)?

10 MHz

770 MHz

77

1

1

13

10000 kHz

No

10 MHz

770 MHz

154

2

2

26

5000 kHz

No

10 MHz

770 MHz 

231

3

3

39

3333 kHz

No

10 MHz

770 MHz

308

4

4

52

2500 kHz

No

10 MHz

770 MHz

385

5

6

1

2000 kHz

Yes

10 MHz

770 MHz

462

6

7

14

1667 kHz

No

10 MHz

770 MHz

539

7

8

27

1429 kHz

No

10 MHz

770 MHz 

616

8

9

40

1260 kHz

No

10 MHz

770 MHz

693

9

10

53

1111 kHz

No

10 MHz

770 MHz

770

10

12

2

1000 kHz

Yes

...              

Note that the smallest R value that works is R=5.  From the slide entitled "Basic PLL Operation", Fcomp = Fosc/R Fcomp = 10 MHz/5 = 2000 kHz.  Note that the minimum continuous divide ratio of 4032, which would imply an N value of 53 and a comparison frequency of 189 kHz, but this is not the highest comparison frequency.  Because it is explicitly stated that the frequency is fixed, it is OK to operate below the minimum continuous divided ratio provided B >= A.