Delay Compensation: Since the root cause is an instantaneous phase error, it seems sensible to try to correct this with an instantaneous phase delay. Current Compensation: A current is injected into the loop filter to try to cancel the fractional spurs. Sigma Delta Compensation: Sigma delta noise shaping is used here. It is based on the concepts of over sampling sigma delta converters. Refer to: "Fractional Compensation" slide in the Fractional N PLL presentation and PLL Performance, Simulation and Design, by Dean Banerjee. (pages 163-165) 896, 897, 898, 899, 900, 901, 902, and 903. Refer to: The Fractional N PLLs presentation(pages 4-8) Because the ratio of comparison frequency to loop bandwidth is 1968, this is far greater than 100, so cycle slipping will seriously degrade the lock time and dominate it. Refer to: Advantages and Pitfalls of Using Fractional N PLLs Online Seminar notes (page 23)