Hello,

This may sound as a stupid question, sorry, but i'm stuck on that since
few days and my searches on the subject didn't helped me so much...

I'm trying to figure the following code, at wich condition the jump will
occurs... :

test eax,eax
je .....

EAX is a 32bit register

So far, what i know :


The TEST instruction (Test for bit pattern) performs a logical AND of
the two operands updating the flags register without saving the result

Usage: TEST dest,src
Modifies flags: CF OF PF SF ZF (AF undefined)


Ok. I can tell you that you will find that on MANY web pages, each of them
happily publihing exactly the sames infos, nothing more than what i've shown
above.

I understand the usage of the TEST instruction with a command like this one :

test ax,00000010b

here, a jump would be executed only if the second bit of ax=1, no matter
of what others bit values are, right ?

but i don't see the point of testing eax against eax ?? when this could be
an interesting condition to check ?? Does it only deal with flags ? (Carry,
Parity, Auxiliary, Sign ?)

I'm currently digging results returned by a search on 'test eax' but i'll
be there for quit a while.. ..

Regards
FoolFox

if i'm not wrong, test opcode doing AND logic against each its param. so if test eax,eax, it is doing and eax,eax. it can be use for testing if eax was zero or not.

hm... maybe ;p

regards

FoolFox, here is an excerpt from the Intel document:

3-450

INSTRUCTION SET REFERENCE

TEST—Logical Compare

Description

Computes the bit-wise logical AND of first operand (source 1 operand) and the second operand
(source 2 operand) and sets the SF, ZF, and PF status flags according to the result. The result is
then discarded.

Operation

TEMP SRC1 AND SRC2;
SF MSB(TEMP);
IF TEMP = 0
THEN ZF 0;
ELSE ZF 1;
FI:
PF BitwiseXNOR(TEMP[0:7]);
CF 0;
OF 0;
(*AF is Undefined*)

Flags Affected
The OF and CF flags are cleared to 0. The SF, ZF, and PF flags are set according to the result

Opcode Instruction Description

A8 ib TEST AL, imm8 AND imm8 with AL; set SF, ZF, PF according to result
A9 iw TEST AX, imm16 AND imm16 with AX; set SF, ZF, PF according to result
A9 id TEST EAX, imm32 AND imm32 with EAX; set SF, ZF, PF according to result
F6 /0 ib TEST r/m8,imm8 AND imm8 with r/m8; set SF, ZF, PF according to result
F7 /0 iw TEST r/m16,imm16 AND imm16 with r/m16; set SF, ZF, PF according to result
F7 /0 id TEST r/m32,imm32 AND imm32 with r/m32; set SF, ZF, PF according to result
84 / r TEST r/m8,r8 AND r8 with r/m8; set SF, ZF, PF according to result
85 / r TEST r/m16,r16 AND r16 with r/m16; set SF, ZF, PF according to result
85 / r TEST r/m32,r32 AND r32 with r/m32; set SF, ZF, PF according to result

Hope you are familiar with the above imm and r/m stuff.

Hello,

thanks for the details...

the pseudo-code listing was VERY instructive.

as far as i know, imm = immediate value, r/m are
register or memory values, which could be 8, 16 or
32bits....

Ok, so what i understand right now is that my jump
could not only be triggered if the register is null (which
was also what i was thinking, tnx Dion ) but also by
the SF and PF flag, right (i'm excluding reg =0, so ZF=0 )?
but then wich condition will make it jump ? only SF=0
&& PF=0 ??

I think i'll more visit Intel site and play a little bit with
my masm & Olly right now

Regards
FoolFox

It's a quick and safe way to see what eax is

test eax eax

Sets ZeroFlag if eax == 0
Sets SignFlag if eax < 0 (less than 0 - negative)

Compared to AND - test does not change the first operand.

JE also checks the ZF just as JZ.

Hope this helps.
JC

Hello,

Thanks JC, it helped me a lot to see what was
finally an error of my part, i was focusing on this test eax,eax
missing few line after what was really important for me
at this point.. (

But you all helped me a lot to better understand this
Test feature along with flags, i've learned some real
interesting stuff today.... glad i come to work today

Tnx again!

Regards
FoolFox