http://contests.anticrack.de
Good luck

yummm

"document all opcodes..."

yeucky. Spit!

I hate documentation...

even worse than the opcode documentation, "... usage and CPU design/architecture"
i literally laughed out loud when i read that

why do they always have to spoil fun-looking projects by including such requirements?

well the doc has to be here else it'd be kinda hard to understand how the CPU works and therefore it would be hard to judge...

Cool thing.

I recently bought the book Virtual Machine Design and Implementation in C/C++ by Bill Blunden . It's a 600 pages book covering exactly this. I thought it would be useful to learn something better then those simple cpu's posted. This book got a example which includes both assembler, debugger aswell as emulator which is around 10000 lines of code. What do you know... maybe I got a advantage now.

This book takes a professional aproach though and not just talking about simple "adders" which I suppose you want.
A real example of such cpu is java and .net

Have you made any estimations of what you really want? I mean would I win if I designed a "java 2"?

// CyberHeg

well.. ppl are free to code what they want
The specs are quite open

that is very strange contest.

CPU-Emulators mostly are commercial subject because of hard work needed.

So i don't think somebody will do Emu as gift.

Why need this contest?

Or maybe will better upgrade existing EMUs?

hi,

i just finished, some days ago, something similar

waste of time

Vecna/29A

A processor is just a state machine.

Risc would be the easiest to emulate,
while cisc would be a tad bit more complicated.

If you can write a disassembler, then you should be able to write an emulator.

Not that complicated....

Regards,

tgodd

There is lots of difference between a disassembler and a emulator. Writing a disassembler you don't need to think just follow the code while a emulator you need to think how to create it. While the result might be the same there are other steps needed to acomplish each task. There is actually alot of theory behind making a usable architecture.
Seeing Vecna's cpu aswell as others just me realise that it's not really worth the effort. If you really plan to make a virtual machine for real use you want it to be able to do more then just add 2+2. This design of Vecna's is unsupprisingly 90% the same as the others I've seen in past. The model of handling input and output is still the same.

I had this thought about making a VM which is capable of doing something more then adding. Lets say one of the design goals would be to make checksum of code, do anti-debugging checks and/or be capable of calculating results on data which would change flow of execution or interpretted code or the interpretter itself if something is wrong.

// CyberHeg

cyberheg,

i think you didnt check the code well, or dont understand asm... check again the input/output, and notice its made in bits (emitbits() in the assembler, or get_bits() in the cpu)

as far i know, no real or emulated cpu do that (not that this is a great thing to do, but its unusual... very different of other things you saw)

beside this, a cpu its done so small blocks are able to build any thing... there´s no point making a cpu so HLL as to have buildin opcode for antidebug check or so

these things must be build from the small blocks: else, it risk become such thing as: load number N(the "opcode" -> execute antidebug trick number N - Switch/Case of antidebug tricks

ancev

ps: after this project, i discovered that, unless you´re coding a emulator for a console/computer/arcade/etc, writting a cpu for such protection/obscurity porpouses its a waste of time.

I heard that some cd protection called star force has something like this and it really showed up to be a waste of time, even if tracing/understanding protection code was very hard, cracking the actual game was quite easy.

btw ancev, your cpu.zip is broken..or is it broken on purpose?:P

yes, it is broken, so i fix it with zipfix.exe

ancev,
why a waste of time? too easy to reverse?
have a look at zot: http://ling.ucsd.edu/~barker/Iota/zot.html
This language has two operations yet it is turing complete. Having so few ops seems like it may be harder to reverse.

Sorry, I made mistake.
I mixed CPU emu with PC emulation.

I have seen such uses of state-machines in code.

The hardlock driver is one.

It is extremely time consuming to traverse the code.

However not impossible.

Regards,

tgodd