Hello,

I’m looking for a detailed document, including code sample, of how to
implement Cache Locking (locking instruction cache & data cache and
creating data ram) in Intel Pentium 4.

It should be similar to the documents I found below, which are for
XScale micro-architecture and CPU 80321.

http://www.intel.com/design/iio/papers/27387202.pdf
(look into section 4.5 and appendix C)

http://www.intel.com/design/intelxscale/27347302.pdf
(look into section 6.4 and its examples)


Thank you.
contact me at : funnyroadboy@yahoo.com as soon as possible !

zitazita:

If you had read the FAQ like you were supposed to, you would have known that you are not supposed to cross-post you question in more than one Forum here. How about you going back and actually reading it now, so you follow the rest of the rules.

Regards,