Neitsa
May 26th, 2005, 16:49
Hello,
I'm currently working on a little tool to disable the use RDTSC for CPL3 process (and enabling RDPMC for CPL3 also).
Some strange behaviours appear :
From the intel manual it is stated that :
1) Bit 2 of CR4 (know as TSD), when Set, will disable RDTSC for ring3 apps
2) Bit 8 of CR4 (known as PCE), when set, will enable RDPMC for ring3 apps
First of all, as stated in the intel manual, I've checked the presence of the TSD field by using :
and testing bit 4 of EDX. It was here !
I made a little driver for the purpose of enabling/disabling those bits, but when setting only the TSD (for RDTSC) it doesn't work at all... RDTSC doesn't raise a privilegied instruction fault.
While testing again, I decided to enable both bits of CR4 (2 & 8) and it worked, at least for RDTSC, but not for RDPMC => RDTSC while raise a privilegied instruction fault, while RDPMC is NOT enabled for ring3 apps...
I'm wondering what i'm doing wrong, or what I've missed.
Attached is a control program and its driver. The control program will display hex values of Control registers (and also Debug registers).
It is clearly shown that those 2 bits are set (CR4 = 0x6D9 before and 0x7DD after modification), but why the hell I have to enable both bits, and why RDPMC isn't ok for CPL3 process ?
WARNING: Enabling RDTSC as a privilegied instruction will cause crash for some apps (for me it crashed only the microsoft update process) so be carefull ! When Leaving the app, bits are restored to there previous known state, so for testing purpose, leave the app alive if you want to try RDTSC and RDPMC.
Thank you very much,
Regards, Neitsa.
I'm currently working on a little tool to disable the use RDTSC for CPL3 process (and enabling RDPMC for CPL3 also).
Some strange behaviours appear :
From the intel manual it is stated that :
1) Bit 2 of CR4 (know as TSD), when Set, will disable RDTSC for ring3 apps
2) Bit 8 of CR4 (known as PCE), when set, will enable RDPMC for ring3 apps
First of all, as stated in the intel manual, I've checked the presence of the TSD field by using :
Code:
mov eax,1
CPUID
and testing bit 4 of EDX. It was here !
I made a little driver for the purpose of enabling/disabling those bits, but when setting only the TSD (for RDTSC) it doesn't work at all... RDTSC doesn't raise a privilegied instruction fault.
While testing again, I decided to enable both bits of CR4 (2 & 8) and it worked, at least for RDTSC, but not for RDPMC => RDTSC while raise a privilegied instruction fault, while RDPMC is NOT enabled for ring3 apps...
I'm wondering what i'm doing wrong, or what I've missed.
Attached is a control program and its driver. The control program will display hex values of Control registers (and also Debug registers).
It is clearly shown that those 2 bits are set (CR4 = 0x6D9 before and 0x7DD after modification), but why the hell I have to enable both bits, and why RDPMC isn't ok for CPL3 process ?
WARNING: Enabling RDTSC as a privilegied instruction will cause crash for some apps (for me it crashed only the microsoft update process) so be carefull ! When Leaving the app, bits are restored to there previous known state, so for testing purpose, leave the app alive if you want to try RDTSC and RDPMC.
Thank you very much,
Regards, Neitsa.