View Online
Download
Receive via Email
54F676 Product Folder |
|---|
| |||
|---|---|---|---|
| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
|---|---|---|---|---|---|
| 54F676 16-Bit Serial Parallel-In, Serial-Out Shift Register | 181 Kbytes | 9-Dec-97 | View Online | Download | Receive via Email |
| 54F676 Mil-Aero Datasheet MN54F676-X | 21 Kbytes | View Online | Download | Receive via Email |
|
If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| 54F676DMQB | CERDIP | 24 | Status | Lifetime buy | N/A | N/A | 50+ | $16.50 | rail of 14 | NSZSSXXYYA> 54F676DMQB /QL | ||
| 6-8 weeks | 500 | |||||||||||
| 54F676SDMQB | CERDIP | 24 | Status | Lifetime buy | N/A | N/A | 50+ | $14.90 | rail of 15 | NSZSSXXYYA> 54F676SDMQB /QL | ||
| 6-8 weeks | 500 | |||||||||||
| 54F676FMQB | CERPACK | 24 | Status | Lifetime buy | N/A | N/A | 50+ | $19.60 | rail of 19 | NSZSSXXYYA> 54F676FMQB QL | ||
| 8-9 weeks | 500 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date |
|---|---|---|---|
| 54F676DMQB. | NA | 54F676DMQB | 12/01/2004 |
| 54F676FMQB. | NA | 54F676FMQB | 12/01/2004 |
| 54F676FM | 54F676FMQB | NATIONAL SEMICONDUCTOR | 09/08/98 |
| 54F676LMQB | 54F676FMQB | NATIONAL SEMICONDUCTOR | 09/08/98 |
| 54F676SDMQB. | NA | 54F676SDMQB | 12/01/2004 |
The 'F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the Mode (M) input is HIGH, information present on the parallel data (P0-P15) inputs is entered on the falling edge of the Clock Pulse (CP#) input signal. When M is LOW, data is shifted out of the most significant bit position while information present on the Serial (SI) input shifts into the least significant bit position. A HIGH signal on the Chip Select (CS#) input prevents both parallel and serial operations. |
|
 |
Website Guide • About "Cookies" • National is QS 9000 Certified • Privacy/Security Statement • Contact Us/Feedback Site Terms & Conditions of Use • Copyright 2003© National Semiconductor Corporation |