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ADC12040  Product Folder

12-Bit, 40 MSPS, 340mW A/D Converter with Internal Sample-and-Hold
  

See Also:
  
ADC12D040 - FOR DUAL ADC
Generic P/N 12040
General
Description
Features Datasheet Package
& Models
Samples
& Pricing
Reliability
Metrics
Application
Notes

Parametric Table Parametric Table
Temperature Min (deg C) -40 
Temperature Max (deg C) 85 
Resolution (bit) 12 
Speed (MSPS) 40 
Supply Voltage (Volt)
Power Dissipation (Watt) .34 
Vin 4Vpp 
INL (+/-) (LSB) .70 
DNL (+/-) (LSB) .40 
ENOB (bit) 11.20 
SINAD (dB) 69.50 
SNR (dB) 70 
SFDR (dB) 86 
THD dB (dB) -82 

Datasheet

TitleSize in KbytesDate
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ADC12040 12-Bit, 40 MSPS, 340 mW A D Converter with Internal Sample-and-Hold 519 Kbytes 2-Jun-03 View Online Download Receive via Email
ADC12040 12-Bit, 40 MSPS, 340 mW A D Converter with Internal Sample-and-Hold (JAPANESE)
297 Kbytes   View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time
QtySPICEIBISQty$US each
ADC12040CIVYLQFP32StatusFull productionN/AN/A24 Hour Samples
Buy Now
1K+$9.00tray
of
250
NSUZXYTT
ADC12040
CIVY
10-12 weeks5000
ADC12040CI MDCUnpackaged DieFull productionN/AN/A   gel pak
of
N/A
-
N/A0
ADC12040CI MWCWaferFull productionN/AN/A   wafer jar
of
N/A
-
N/A0

General Description

The ADC12040 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 40 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 340 mW at 40 MSPS, including the reference current. The Power Down feature reduces power consumption to 40 mW.

The differential inputs provide a full scale input swing equal to VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.

This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of -40°C to +85°C.

Features

  • Single supply operation
  • Internal sample-and-hold
  • Outputs 2.5V to 5V compatible
  • TTL/CMOS compatible input/outputs
  • Low power consumption
  • Power down mode
  • On-chip reference buffer

Key Specification

Resolution

12 Bits

Conversion Rate

40 MSPS (min)

DNL

±0.4 LSB (typ)

INL

±0.7 LSB (typ)

SNR (fIN = 10MHz)

69 dB (typ)

ENOB (fIN = 10MHz)

11.2 bits (typ)

Data Latency

6 Clock Cycles

Supply Voltage

+5V ±5%

Power Consumption, 40 MHz

340 mW (typ)

Applications

  • Ultrasound and Imaging
  • Instrumentation
  • Cellular Base Stations/Communications Receivers
  • Sonar/Radar
  • xDSL
  • Wireless Local Loops/Cable Modems
  • HDTV/DTV
  • DSP Front Ends

Reliability Metrics

Part Number Process Early Failure Rate - Rejects Sample Size (EFR) PPM * Rel. Rejects Device Hours Long Term Failure Rates (FITS) MTTF
ADC12040CI MDCCMOS721420014108000005226190940
ADC12040CI MWCCMOS721420014108000005226190940
ADC12040CIVYCMOS721420014108000005226190940

For more information on Reliablitity Metrics, please click here.


Application Notes

TitleSize in KbytesDate
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AN-1261: Application Note 1261 Power Supply Effects on Noise Performance 53 Kbytes 27-Sep-02 View Online Download Receive via Email

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[Information as of 15-Jan-2004]