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ADC12L066  Product Folder

12-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with Internal Sample-and-Hold
Generic P/N 12L066
General
Description
Features Datasheet Package
& Models
Samples
& Pricing
Reliability
Metrics
Application
Notes

Parametric Table Parametric Table
Temperature Min (deg C) -40 
Temperature Max (deg C) 85 
Resolution (bit) 12 
Speed (MSPS) 66 
Supply Voltage (Volt)
Power Dissipation (Watt) .3570 
Vin 2Vpp 
INL (+/-) (LSB) 1.20 
DNL (+/-) (LSB) .40 
ENOB (bit) 10.70 
SINAD (dB) 66 
SNR (dB) 66 
SFDR (dB) 80 
THD dB (dB) -77 

Datasheet

TitleSize in KbytesDate
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ADC12L066 12-Bit, 66 MSPS, 450 MHz Bandwidth A D Converter with Internal Sample-and-Hold 756 Kbytes 1-Dec-03 View Online Download Receive via Email
ADC12L066 12-Bit, 66 MSPS, 450 MHz Bandwidth A D Converter with Internal Sample-and-Hold (JAPANESE)
418 Kbytes   View Online Download Receive via Email

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Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time
QtySPICEIBISQty$US each
ADC12L066EVALevaluation boardPreliminaryN/AN/A   N/A-
N/A
ADC12L066CIVYLQFP32StatusFull productionN/AN/A24 Hour Samples
Buy Now
1K+$17.10tray
of
250
NSUZXYTT
ADC12L0
66CIVY
10-12 weeks2000
ADC12L066CIVYXLQFP32StatusFull productionN/AN/A 1K+$17.10reel
of
1000
NSUZXYTT
ADC12L0
66CIVY
10-12 weeks2000

General Description

The ADC12L066 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 66 Megasamples per second (MSPS), minimum, with typical operation possible up to 80 MSPS. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 450 MHz. Operating on a single 3.3V power supply, this device consumes just 357 mW at 66 MSPS, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.

This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of -40°C to +85°C. An evaluation board is available to facilitate the evaluation process.

Features

  • Single supply operation
  • Low power consumption
  • Power down mode
  • On-chip reference buffer

Key Specification

Resolution

12 Bits

Conversion Rate

66 MSPS

Full Power Bandwidth

450 MHz

DNL

±0.4 LSB (typ)

SNR (fIN = 10 MHz)

66 dB (typ)

SFDR (fIN = 10 MHz)

80 dB (typ)

Data Latency

6 Clock Cycles

Supply Voltage

+3.3V ± 300 mV

Power Consumption, 66 MHz

357 mW (typ)

Applications

  • Ultrasound and Imaging
  • Instrumentation
  • Cellular Base Stations/Communications Receivers
  • Sonar/Radar
  • xDSL
  • Wireless Local Loops
  • Data Acquisition Systems
  • DSP Front Ends

Reliability Metrics

Part Number Process Early Failure Rate - Rejects Sample Size (EFR) PPM * Rel. Rejects Device Hours Long Term Failure Rates (FITS) MTTF
ADC12L066CIVYCMOS721420014108000005226190940
ADC12L066CIVYXCMOS721420014108000005226190940
ADC12L066EVALCMOS721420014108000005226190940

For more information on Reliablitity Metrics, please click here.


Application Notes

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[Information as of 15-Jan-2004]