FPD85308 Product Folder |
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| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
Reliability Metrics |
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| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
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| FPD85308 Panel Timing Controller | 474 Kbytes | 1-Aug-01 | View Online | Download | Receive via Email |
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| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| FPD85308EVK | evaluation board | Lifetime buy | N/A | N/A | 1+ | $149.00 | 1 | - | ||||
| 4 weeks | 0 | |||||||||||
| FPD85308VJD | TQFP | 100 | Status | Custom | N/A | N/A | 1K+ | $3.95 | tray of 90 | - | ||
| 8 weeks | 0 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date |
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| FPD85308EVK | FPD85308EVK | NONE | 06/02/2004 |
The FPD85308 Panel Timing Controller is an integrated FPD-Link based TFT-LCD timing controller. It resides on the flat panel display and provides the interface signal routing and timing control between graphics or video controllers and a TFT-LCD system. FPD-Link is a low power, low electromagnetic interference interface used between this controller and the host system. The FPD85308 chip links the panel's system interface to the LCD display via a ten wire LVDS data bus. The data is then routed to the source and gate display drivers. Both XGA and SVGA resolutions are supported. The FPD85308 is programmable via an optional external serial EEPROM. Reserved space in the EEPROM is available for display identification information. The system can access the EEPROM to read the display identification data or program initialization values used by the FPD85308. |
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| Part Number | Process | Early Failure Rate - Rejects | Sample Size (EFR) | PPM * | Rel. Rejects | Device Hours | Long Term Failure Rates (FITS) | MTTF |
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| FPD85308VJD | CMOS7 | 2 | 14200 | 141 | 0 | 800000 | 5 | 226190940 |
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