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LF298  Product Folder

Monolithic Sample and Hold Circuit
Generic P/N 298
General
Description
Features Datasheet Package
& Models
Samples
& Pricing

Parametric Table Parametric Table
Temperature Min (deg C) -25 
Temperature Max (deg C) 85 
Offset Voltage (mV)

Datasheet

TitleSize in KbytesDate
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Download

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LF198 LF298 LF398, LF198A LF398A Monolithic Sample-and-Hold Circuits 520 Kbytes 23-Aug-00 View Online Download Receive via Email
LF198 LF298 LF398, LF198A LF398A Monolithic Sample-and-Hold Circuits (JAPANESE)
503 Kbytes   View Online Download Receive via Email

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Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time
QtySPICEIBISQty$US each
LF298MSOIC NARROW14StatusFull productionN/AN/A24 Hour Samples
Buy Now
1K+$2.85rail
of
55
NSUZXYTT
LF298M
3-5 weeks7500
LF298MXSOIC NARROW14StatusFull productionN/AN/A 1K+$2.85reel
of
2500
NSUZXYTT
LF298M
3-5 weeks7500
LF298HTO-58StatusFull productionN/AN/A 
Buy Now
1K+$6.00box
of
500
NSZXYTT LF298H
4-5 weeks3000

General Description

The LF198/LF298/LF398 are monolithic sample-and-hold circuits which utilize BI-FET technology to obtain ultra-high dc accuracy with fast acquisition of signal and low droop rate. Operating as a unity gain follower, dc gain accuracy is 0.002% typical and acquisition time is as low as 6 µs to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin, and does not degrade input offset drift. The wide bandwidth allows the LF198 to be included inside the feedback loop of 1 MHz op amps without having stability problems. Input impedance of 1010Ohm allows high source impedances to be used without degrading accuracy.

P-channel junction FET's are combined with bipolar devices in the output amplifier to give droop rates as low as 5 mV/min with a 1 µF hold capacitor. The JFET's have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design guarantees no feed-through from input to output in the hold mode, even for input signals equal to the supply voltages.

Features

  • Operates from ±5V to ±18V supplies
  • Less than 10 µs acquisition time
  • TTL, PMOS, CMOS compatible logic input
  • 0.5 mV typical hold step at Ch = 0.01 µF
  • Low input offset
  • 0.002% gain accuracy
  • Low output noise in hold mode
  • Input characteristics do not change during hold mode
  • High supply rejection ratio in sample or hold
  • Wide bandwidth
  • Space qualified, JM38510

Logic inputs on the LF198 are fully differential with low input current, allowing direct connection to TTL, PMOS, and CMOS. Differential threshold is 1.4V. The LF198 will operate from ±5V to ±18V supplies.

An "A" version is available with tightened electrical specifications.

[Information as of 15-Jan-2004]