LM12L458 Product Folder |
|---|
| |||
|---|---|---|---|
| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
Reliability Metrics |
Application Notes |
|
| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
|---|---|---|---|---|---|
| LM12L458 12-Bit + Sign Data Acquisition System with Self-Calibration | 695 Kbytes | 7-Jul-99 | View Online | Download | Receive via Email |
| LM12L458 12-Bit + Sign Data Acquisition System with Self-Calibration (JAPANESE) |
532 Kbytes |
|
If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| LM12L458CIV | PLCC | 44 | Status | Full production | N/A | N/A | 250+ | $15.00 | rail of 25 | NSUZXYYTT LM12L458CIV | ||
| 10-12 weeks | 1000 | |||||||||||
The LM12L458 is a highly integrated 3.3V Data Acquisition System. It combines a fully-differential self-calibrating (correcting linearity and zero errors) 13-bit (12-bit + sign) analog-to-digital converter (ADC) and sample-and-hold (S/H) with extensive analog functions and digital functionality. Up to 32 consecutive conversions, using two's complement format, can be stored in an internal 32-word (16-bit wide) FIFO data buffer. An internal 8-word RAM can store the conversion sequence for up to eight acquisitions through the LM12L458's eight-input multiplexer. The LM12L458 can also operate with 8-bit + sign resolution and in a supervisory "watchdog" mode that compares an input signal against two programmable limits. Programmable acquisition times and conversion rates are possible through the use of internal clock-driven timers. All registers, RAM, and FIFO are directly addressable through the high speed microprocessor interface to either an 8-bit or 16-bit databus. The LM12L458 includes a direct memory access (DMA) interface for high-speed conversion data transfer. |
|
(fCLK = 6 MHz)
|
|
| Part Number | Process | Early Failure Rate - Rejects | Sample Size (EFR) | PPM * | Rel. Rejects | Device Hours | Long Term Failure Rates (FITS) | MTTF |
|---|---|---|---|---|---|---|---|---|
| LM12L458CIV | CS150 | 2 | 13900 | 144 | 0 | 899500 | 4 | 254323438 |
| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
|---|---|---|---|---|---|
| AN-906: Interfacing the LM12454/8 Data Acquisition System Chips to Microprocessors and Microcontrollers | 561 Kbytes | 5-Aug-95 | View Online | Download | Receive via Email |
| Interfacing the LM12454/8 Data Acquisition System Chips to Microprocessors and Microcontrollers (JAPANESE) |
880 Kbytes | ||||
| AN-949: Interfacing the LM12454/8 Data Acquisition System Chips to the 80C51 Family of Microcontrollers | 579 Kbytes | 5-Aug-95 | View Online | Download | Receive via Email |
|
If you have trouble printing or viewing PDF file(s), see Printing Problems. |
Website Guide About "Cookies" National is QS 9000 Certified Privacy/Security Statement Contact Us/Feedback Site Terms & Conditions of Use Copyright 2003© National Semiconductor Corporation |