MM54C74 Product Folder |
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| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
Reliability Metrics |
| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
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| MM54C74 Dual D Flip-Flop | 120 Kbytes | 8-Jan-98 | View Online | Download | Receive via Email |
| MM54C74 Mil-Aero Datasheet MNMM54C74-X | 14 Kbytes | View Online | Download | Receive via Email |
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If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| MM54C74J/883 | CERDIP | 14 | Status | Lifetime buy | N/A | N/A | 50+ | $14.80 | rail of 25 | NSZSSXXYYA> MM54C74J/883QL | ||
| 7-9 weeks | 500 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date |
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| MM54C74J/883 | NATIONAL | MM54C74J/883 | 09/01/2004 |
| MM54C74W/883 | 54AC74FMQB | NATIONAL SEMICONDUCTOR | 06/08/99 |
The MM54C74/MM74C74 dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q# outputs. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input. |
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| Part Number | Process | Early Failure Rate - Rejects | Sample Size (EFR) | PPM * | Rel. Rejects | Device Hours | Long Term Failure Rates (FITS) | MTTF |
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| MM54C74J/883 | CMOS | 0 | 9000 | 0 | 0 | 400000 | 9 | 113095470 |
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