- X-Bus Extension for read and write operations
- LPC bus interface, based on Intel's LPC Interface Specification Rev. 1.01, February 1999 (supports CLKRUN and LPCPD signals) and Intel FWH transactions
- PC99 and ACPI compliant
-
Serial IRQ support (15 options)
-
Interrupt Serializer (four Parallel IRQs to Serial IRQ)
-
PPM for external FDD signal support
-
MIDI interface compatible with MPU-401 UART mode
-
Game port inputs for up to two joysticks
-
Protection features, including GPIO lock and pin configuration lock
-
32 GPIO ports (16 standard, 16 with Assert IRQ/SMI
-
5V tolerant and back-drive protected pins (except LPC bus pins)
-
100-pin TQFP Package
Features
- LPC System Interface
-
Synchronous cycles, up to 33 MHz bus clock
- 8-bit I/O cycles
- Up to four 8-bit DMA channels
- #LPCPD and #CLKRUN support
- Implements PCI mobile design guide recommendation PCI Mobile Design Guide 1.1, Dec. 18, 1998)
- Memory and FWH transaction support
- Interrupt Serializer
- Four Parallel IRQs to Serial IRQ
- Musical Instrument Digital Interface (MIDI) Port
- Compatible with MPU-401 UART mode
- 16-byte Receive and Transmit FIFOs
- Loopback mode support
- Game Port
- Compatible with the Legacy Game Port definition
- Full digital implementation
- Supports up to two analog joysticks
- X-Bus Extension
- Supports read and write operations
- 8-bit data bus
- Up to 28-bit address bus supports up to 256MB data
- Two chip select pins
- Interrupt routing via PIRQ pins
- Supports BIOS flash devices
- PC99 and ACPI Compliant
- PnP Configuration Register structure
- Flexible resource allocation for all logical devices
- Relocatable base address
- Fifteen IRQ routing options
- Four optional 8-bit DMA channels (where applicable)
- Clock Sources
- 32.768 KHz, 14.318 MHz or 48 MHz clock input
- LPC clock, up to 33 MHz
- Power Supply
- 3.3V supply operation
- All pins are 5V tolerant
- All pins are back-drive protected, except LPC bus pins
- Wake-Up Control
- Optional routing of IRQ to power-up event
- 32 General-Purpose I/O (GPIO) Ports
- Sixteen standard, with Assert IRQ/#SMI for 16 ports
- Programmable drive type for each output pin (open-drain, push-pull or output disable)
- Programmable option for internal pull-up resistor on each input pin
- Output lock option
- Input debounce mechanism
- Floppy Disk Controller (FDC)
- Programmable write protect
- FM and MFM mode support
- Enhanced mode command for three-mode Floppy Disk Drive (FDD) support
- Perpendicular recording drive support for 2.88 MB
- Burst and non-burst modes
- Full support for IBM Tape Drive register (TDR) implementation of AT and PS/2 drive types
- 16-byte data FIFO
- Error-free handling of data overrun and underrun
- Software compatible with the PC8477, which contains a superset of the FDC functions in the µDP8473, the NEC µPD765A and the N82077
- High-performance, digital separator
- Standard 5.25" and 3.5" FDD support
- Supports up to four floppy disk drives
- Supports fast tape drives (2 Mbps) and standard tape drives (1 Mbps, 500 Kbps and 250 Kbps)
- Supports external drive via parallel port pins
- IEEE 1284 Compliant Parallel Port
- ECP, including Level 2 (14 mA sink and source output buffers)
- Software or hardware control
- Enhanced Parallel Port (EPP) compatible with EPP 1.7 and EPP 1.9
- EPP support as mode 4 of the Extended Control Register (ECR)
- Selection of internal pull-up or pull-down resistor for Paper End (PE) pin
- Supports a demand DMA mode mechanism and a DMA fairness mechanism for improved bus utilization
- Protection circuit that prevents damage to the parallel port when a printer connected to it powers up or is operated at high voltages, even if the device is in power-down
- Parallel Port Multiplexer (PPM) to support additional external FDC signals on parallel port pins for FDD use
- Serial Port 1 (SP1)
- Software compatible with the 16550A and the 16450
- Shadow register support for write-only bit monitoring
- UART data rates up to 1.5 Mbaud
- Serial Port 2 with Fast Infrared (SP2 with FIR)
- Software compatible with the 16550A and the 16450
- Shadow register support for write-only bit monitoring
- UART data rates up to 1.5 Mbaud
- FIR IrDA 1.1 compliant
- HP-SIR
- ASK-IR option of SHARP-IR
- DASK-IR option of SHARP-IR
- Consumer Remote Control supports RC-5, RC-6, NEC, RCA and RECS 80
- DMA support - one or two channels
- PnP dongle support
- WATCHDOG Timer
- Times out the system based on user-programmable time-out period
- System power-down capability for power saving
- User-defined trigger events to restart WATCHDOG
- Optional routing of WATCHDOG output on IRQ and/or SMI lines
-
Strap Configuration
- Base Address (BADDR) strap to determine the base address of the Index-Data register pair
- Test strap to force the device into test mode (reserved for National Semiconductor use)
- X-Bus straps (XCNF2-0) define the functionality of the X-Bus at reset
The following table shows the main features for each device in the PC8739x family.
|
Function
|
PC87391
|
PC87392
|
PC87393
|
PC87393F
|
|
LPC System Interface
|
yes
|
yes
|
yes
|
yes
|
|
Interrupt Serializer
|
yes
|
yes
|
yes
|
yes
|
|
Musical Instrument Digital Interface (MIDI) Port
|
no
|
no
|
yes
|
yes
|
|
Game Port
|
no
|
no
|
yes
|
yes
|
|
X-Bus Extension
|
no
|
no
|
yes
|
yes
|
|
FWH Emulation
|
no
|
no
|
no
|
yes
|
|
PC99 and ACPI Compliant
|
yes
|
yes
|
yes
|
yes
|
|
Wake-Up Control
|
yes
|
yes
|
yes
|
yes
|
|
General-Purpose I/O (GPIO) Ports
|
no
|
yes
|
yes
|
yes
|
|
Floppy Disk Controller (FDC)
|
yes
|
yes
|
yes
|
yes
|
|
IEEE 1284 compliant Parallel Port
|
yes
|
yes
|
yes
|
yes
|
|
Serial Port 1 (SP1)
|
yes
|
yes
|
yes
|
yes
|
|
Serial Port 2 with Fast Infrared (SP2 with FIR)
|
yes
|
yes
|
yes
|
yes
|
|
WATCHDOG Timer
|
yes
|
yes
|
yes
|
yes
|
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