HOME HOME SELECT DESIGN BUY EXPLORE About Us Support My Profile Search

 Products > Advanced PC > Mobile > Keyboard & System Control > PC87591L

PC87591L  Product Folder

LPC Mobile Embedded Controllers
Generic P/N 87591L
General
Description
Features Datasheet Package
& Models
Samples
& Pricing
Application
Notes

Parametric Table Parametric Table
Temperature Min (deg C) 0000000000.0000 
Temperature Max (deg C) 70 
Output Bus LPC 
Code Memory (Bytes)
RAM Size Bytes (Bytes) 2000 
Security Features No 
I/O () 93 

Datasheet

TitleSize in KbytesDate
View Online

Download

Receive via Email
PC87591E, PC87591S and PC87591L LPC Mobile Embedded Controllers 5156 Kbytes 3-Sep-02 View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time
QtySPICEIBISQty$US each
PC87591L-VPCN01LQFP176StatusFull productionN/Apc97591.ibs 1K+$9.51tray
of
40
UZXYYTT
C M NSC03 B3
12 weeks0

General Description

The National Semiconductor® PC87591E, PC87591S andPC87591L are highly integrated, embedded controllers with an embedded-RISC core and integrated advanced functions. These devices are targeted for a wide range of portable applications that use the Low Pin Count (LPC) interface.

The PC87591S is targeted for security applications and includes supporting hardware such as the Hardware Random Number Generator. The PC8591L replaces the on-chip flash with 4K of boot ROM for value solutions using shared BIOS architecture. "PC87591x" refers to all the devices.

The PC87591x incorporates National's CompactRISCTM CR16B core (a high-performance 16-bit RISC processor), on-chip flash (ROM for the PC87591L) and RAM memories, system support functions and a Bus Interface Unit (BIU) that directly interfaces with optional external memory (such as flash) and I/O devices.

System support functions include: WATCHDOG and other timers, interrupt control, general-purpose I/O (GPIO) with internal keyboard matrix scanning, PS/2® Interface, ACCESS.bus« interface, high accuracy analog-to-digital (ADC) and digital-to-analog converters (DAC) for battery charging, system control, system health monitoring and analog controls.

The PC87591x interfaces with the host via an LPC interface that provides the host with access to the Keyboard and embedded controller interface channels, integrated functions, Real-Time Clock (RTC), BIOS firmware and security functions.

Like members of National's SuperI/O family, the PC87591x is PC01 and ACPI compliant.


Outstanding Features

  • Host interface, based on Intel’s LPC Interface Specification Revision 1.0, September 29th, 1997
  • PC01 Rev 1.0, and ACPI 2.0 compliant
  • 16-bit RISC core, with 2 Mbyte address space, and running at up to 20 MHz
  • Software and Hardware controlled clock throttling
  • Shared BIOS flash memory (internal and/or external)
  • Y2K-compliant RTC
  • 84/117 GPIO ports (for 128-pin/176-pin packages) with a variety of wake-up events
  • Extremely low current consumption in Idle mode
  • JTAG-based debugger interface
  • 128-pin and 176-pin options, in LQFP and CSP packages (PC87591L is 176-pin only)

Features

  • Processing Unit
    • CompactRISC CR16B 16-bit embedded RISC processor core (the "core")
    • 2 Mbyte address space
  • Internal Memory
    • Up to 128 Kbytes of on-chip flash memory (4 Kbytes of ROM in the PC87591L)
    • Supports BIOS (flash) memory sharing with PC host
    • On-chip flash is field upgradable by host, CR16B, parallel interface or JTAG
    • Boot blocks for both CR16B and Host Code
    • Memory contents protection and security
    • Hardware-protected boot zone with block protection circuit
    • 2K (PC87591E/L) or 4K of on-chip RAM (PC87591S)
    • All memory types can hold both code and data
  • Expansion Memory (Optional in 176-pin package)
    • Up to 1 Mbyte of additional code and data
    • Supports BIOS (flash) memory sharing with PC host
    • Supports external memory power-down mode
    • Field upgradable with flash or SRAM devices
    • Supports host-controlled code download and up-date
    • Bus Interface Unit (BIU)
      • Three address zones for static devices (SRAM, ROM, flash, I/O)
      • Configurable wait states and fast-read, single-cycle bus cycles
      • 8- or 16-bit wide bus
  • LPC System Interface
    • Synchronous cycles, up to 33 MHz bus clock
    • Serial IRQ
    • I/O and Memory read and write cycles
    • Bootable memory support
    • Bus Master read and write cycles
    • Reset input
    • Base Address (BADDR) strap to determine the base address of the Index-Data register pair
    • LPCPD and CLKRUN support
    • FWH Transaction support
  • Security Function Support
    • Random Number Generator (RNG)
    • Full Random using temperature, voltage and system noise.
    • Memory access protection

Embedded Controller System Features

  • Host Bus Interface (HBI)
    • Three host interface channels, typically used for the KBC, ACPI Private or Shared EC channels
    • 8042 KBC standard Interface (legacy 60 16 , 64 16 )
    • Intel 80C51SL compatible
    • IRQ1 and IRQ12 support
    • Fast Gate A20 and Fast Host Reset via firmware
    • PM interface port (legacy 62 16 , 66 16 )
    • ACPI Embedded Controller with either Shared or Private interface
    • IRQ, SMI or SCI generation
  • Interrupt Control Unit (ICU)
    • 31 maskable vectored interrupts (of which 26 are external)
    • General-purpose external interrupt inputs through MIWU
    • Enable and pending indication for each interrupt
    • Non-maskable interrupt input
  • Multi-Input Wake-Up (MIWU)
    • Supports up to 32 wake-up or interrupt inputs
    • Generates wake-up event to PMC (Power Management Controller)
    • Generates interrupts to ICU
    • Provides user-selectable trigger conditions
  • General-Purpose I/O (GPIO)
    • 84/117 port pins in 128-pin/176-pin package, respectively.
    • I/O pins individually configured as input or output
    • Configurable internal pull-up resistors
    • Special ports for internal keyboard matrix scanning
      • 16 open-collector outputs
      • Eight Schmitt inputs with internal pull-ups
    • Input for system On/Off switch
    • 27 external wake-up events
    • Low-cost external GPIO expansion through the BIU I/O Expansion protocol
  • PS/2 Interface
    • Supports four external ports: Keyboard, mouse and two additional pointing devices
    • Supports byte-level handling via hardware accelerator
  • Two ACCESS.bus (ACB) Interface modules. Each is:
    • Intel SMBus® and Philips I2C® compatible
    • ACCESS.bus master and slave
    • Up to three simultaneous slave addresses detected
    • Supports polling and interrupt controlled operation
    • Generates a wake-up signal on detection of a Start Condition while in Idle mode
    • Optional internal pull-up on SDA and SCL pins
  • Two 16-bit Multi Function Timer (MFT16) modules. Each module:
    • Contains two 16-bit timers
    • Supports Pulse Width Modulation (PWM), Capture and Counter
  • Universal Synchronous/ Asynchronous Receiver-transmitter (USART)
    • A full-duplex USART channel
    • Programmable baud rate
    • Data transfer via interrupt or polling
    • Synchronous mode with either internal or external clock
    • 7-, 8- or 9-bit protocols
  • Pulse Width Modulation (PWM) Module
    • Eight outputs
    • 8-bit duty cycle resolution
    • Common input clock prescaler
  • Timer and WATCHDOG (TWM)
    • 16-bit periodic interrupt timer with 30 microseconds resolution and 5-bit prescaler for system tick and periodic wake-up tasks
    • 8-bit WATCHDOG timer
  • Analog to Digital Converter (ADC)
    • Fourteen channels, with 10-bit resolution
    • Sigma-delta technology for high noise rejection
    • Three voltage measurements and one temperature measurement every 100 ms
    • Internal voltage reference
  • Hardware Monitoring
    • Controlled by embedded controller
    • System Voltage Measurement
      • Up to eight external measurement points
      • Four internal measurement points
      • Smart power failure detection
    • Diode-Based Temperature Measurement
      • Software-controlled fault detection
      • Hardware-monitored over-temperature detection
    • Production time calibration using flash parameters
  • Digital to Analog Converter (DAC)
    • Four channels, 8-bit resolution
    • 1 microsecond conversion time for 50 pF load
    • Full output range from AGND to AVCC
  • Analog Comparators Monitor (ACM)
    • Eight comparator inputs on KBD scan inputs
    • 6-bit input measurement resolution
    • Scan and Threshold modes
    • Supports low-current system wake-up
  • Development Support Features
    • Interface to debugger via JTAG pins
      • ISE/ADB mode
      • On-board Debug mode
    • Flash programing via JTAG
  • CR16B Access to Host Controlled Functions
    • Enabled when host inactive

Host Controlled Functions Features

  • Supports Microsoft®Advanced Power Management (APM) Specifications Revision 1.2, February 1996
    • Generates the System Management Interrupt (SMI)
  • PC1 and ACPI Compliant
    • PnP Configuration Register structure
    • Flexible resource allocation for all logical devices
      • Relocatable base address
      • 15 IRQ routing options
  • Legacy free support
  • Real-Time Clock (RTC)
    • DS1287 and MC146818 compatible
    • 242-byte battery backed-up CMOS RAM
    • Calendar including century and automatic leap-year adjustment (Y2K compliant)
    • Optional adjustment for daylight saving time
    • BCD or binary format for timekeeping
    • Three individually maskable interrupt event flags: periodic rates from 122 microseconds to 500 milliseconds; time-of-day alarm, once-per-second to once-per-day
    • Double-buffer time registers
    • Alarm wake-up
  • Mobile System Wake-Up Control (MSWC)
    • Wake-up on detection of #RI1, #RI2, #RING activity
      • External modem ring on serial port
      • Ring pulse or pulse train on #RING input signal
      • Software-controlled off events
    • Optional routing of power-up request on IRQ and/or SMI lines

Clocking, Supply and Package Information

  • Strap Input Controlled Operating Modes
    • Turn on shared BIOS
    • TRI-STATETM
    • Development
    • On-board development
    • Programing environment
  • Clocks
    • Single 32.768 KHz crystal oscillator
    • LPC clock, up to 33 MHz
    • On-chip high frequency clock generator
      • CPU clock 4-20 MHz
      • Software-controlled frequency generation
      • Multiplier source 32 KHz input
    • 32 KHz clock out
    • CR16B clock out
  • Power Supply
    • 3.3V supply operation
    • 5V tolerance and back-drive protection on all pins (except LPC bus pins and keyboard scan inputs)
    • Separate supply for Host I/F (VDD) and Embedded Controller functions (VCC)
    • Backup battery input for RTC, and wake-up configuration.
    • Reduced power consumption capability
      • Four power modes, switched by software or hardware
      • Active mode current (TBD mA)
      • Active mode executing WAIT
      • Idle (15 microamperes)
      • Power off for RTC only (0.9 microamperes typical) from backup battery
    • Automatic wake-up on system events
  • Package Options
    • 128-pin LQFP and CSP packages
    • 176-pin LQFP and CSP packages for more GPIO pins, Expansion Memory use and development systems

Application Notes

TitleSize in KbytesDate
View Online

Download

Receive via Email
AN-1283: AN-1283 PC87591x Host Interrupt Routing via the CR16B Core 94 Kbytes 29-May-03 View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 15-Jan-2004]