http://i36.tinypic.com/atu1p3.jpg

Normally, memory is made with flip-flops, but an SR flip-flop requires two relays per bit. Lets not even get into the relay requirements for the other flip-flips. :o

My design uses capacitors which can be charged and discharged quickly, and are very cheap. The relay requirements are much less, especially when you start scaling the design to many registers. The best part about this design is that the memory will persist after the power has been disconnected. Great for if you want to program something into the memory semi-permanently. There is a fault, though, if one were to be in write mode (which means the RD/!WR is low) and the power was interrupted, that register's data will likely zero out. The register enable line also must go low before a RD/!WR state changes, or memory corruption will occur.

The largest design concern is choosing a proper capacitance that can open the relay keep-alive.

The relay requirements are:

1 Register Enable Relay times # of Registers
2 times # of bits per register. Maximum number of relays. Use of multi-pole relays will lower the count.
# of bits. This is for the keep-alive/recharge states.
# of bits. This is for the data input relays.

For one eight-bit register, this is 25 relays, assuming the use of DP relays for RD/!WR state changing. The formula for a memory module having M registers with N bits is: M + 3N

As you can see, the number of relays required for each register is much smaller than two relays per bit when more than one register is made. Each n bit (that is, bit 0 of Register X is tied to bit 0 of Register Y) is ganged together at one side, and the other side is switched between ground and floating depending on which register is to be chosen. This way, all n bits for every register are available by merely enabling a ground path.

wite boy i want mah edukation

Okay, I see lots of switches and capacitors. Now, erm...what does it do?

I am sorry. My electronics skillz are teh phail.

Okay, I see lots of switches and capacitors. Now, erm...what does it do?

I am sorry. My electronics skillz are teh phail.

It's a method of data storage. The basis of RAM, in other words. Solid-state RAM uses solid-state flip-flops to keep the data state, and all of the data storage schemes I've seen for relay logic work on a similar basis. I thought this was an extremely wasteful method of data storage so I devised a method of semi-permanent memory using capacitors that will not lose their state when the memory bank is powered down.

Like I said above, the D flip-flop in relay logic uses 4 relays per bit. To store a single 8-bit word (your OS probably has 32 bit words, just to show just how wasteful it is) I would need 32 relays. Breaking the bank for a single relay is a shitty idea. My method needs only one relay for the entire register and has permanent storage, both are extremely important concepts. Not only is this scheme cheaper, it is also more reliable, and consumes less power.

When you scale this towards a large amount of register, it uses 32 times fewer relays. Obviously you can see why this is a great thing if I were interested in building a relay computer. (Which I am. ;))

Your schematic is rather confusing, but I think I can help. First, you want it to be non-volatile. This is simply impossible with regular relays. A big capacitor can keep the coil energized for a fer seconds, or even minutes, but once it drains you lose data. What you need are latching relays.

I'm not really sure how your arrays are set up either. Why not use a regular matrix of address and data lines? It's very efficient, requiring as few as n+2sqrt(n) relays.

I suggest you model the whole thing like an array of toggle flip flops. It's probably not easiest to have every bit toggle instead of set either high or low, so you can use an extra SPDT contact on the relay to act as a polarity switch, causing it to only toggle if the current state differs from the desired.

If none of this makes sense, let me know and I'll try to draw something up.

Your schematic is rather confusing, but I think I can help. First, you want it to be non-volatile. This is simply impossible with regular relays. A big capacitor can keep the coil energized for a fer seconds, or even minutes, but once it drains you lose data. What you need are latching relays.

I'm not really sure how your arrays are set up either. Why not use a regular matrix of address and data lines? It's very efficient, requiring as few as n+2sqrt(n) relays.

I suggest you model the whole thing like an array of toggle flip flops. It's probably not easiest to have every bit toggle instead of set either high or low, so you can use an extra SPDT contact on the relay to act as a polarity switch, causing it to only toggle if the current state differs from the desired.

If none of this makes sense, let me know and I'll try to draw something up.

Toggle flip flips take two relays per bit. I'm already looking at the PC counter and it uses toggle flip flops.

The capacitors do not keep any relays energized until the read relay array is switched on. The capacitor values must be chosen so that they will be able to turn on a relay which will switch a Vcc source to keep that relay closed. This voltage source also puts Vcc into the capacitor. Thus, we do not need a memory refresh like standard RAM needs because it happens every time it is read, automatically.

For my schematic, I simply did it for one register. My explanation for scaling to more registers is confusing, so I will put up another schematic detailing exactly what I mean, and in a more intuitive and cleaner manner.

Still, this method requires only one relay for the entire register, no matter how large it is, and 3 times more relays than the number of bits in the register as overhead, which do not scale at all with the number of registers. Basically, this is the holy grail for relay memory storage. Improvements might be made in how the RD/!WR and keep-alive circuits are made, but I don't see any way to get fewer than a single relay for an entire register.

http://i33.tinypic.com/ehen28.png

The switches at the bottom are both actuated by the keep-alive relay. I also changed the logic to !RD/WR in order to enable the data input flip flops to change states without disrupting whatever is already in the register. Originally, I just had relays controlling the input.

This schematic shows how everything will be wired up for four registers. As you can see, not many relays are required, except for overhead stuff.

So you're using capacitors for the data storage, not relays. It looks like DRAM to me. Not a bad thing, except it's definitely volatile. And refreshing will be annoying. And once you read a bit, you lose it.

Still looks neat though. It might be easiest to model it directly from a DRAM schematic. It would be fun to build a big board full of tiny SMD capacitors, and have it plug directly into a EEPROM DIP socket. You could add extra memory to your 8086.

So you're using capacitors for the data storage, not relays. It looks like DRAM to me. Not a bad thing, except it's definitely volatile. And refreshing will be annoying. And once you read a bit, you lose it.

Still looks neat though. It might be easiest to model it directly from a DRAM schematic. It would be fun to build a big board full of tiny SMD capacitors, and have it plug directly into a EEPROM DIP socket. You could add extra memory to your 8086.

It's not any more volatile than a capacitor discharging into the open air. The grounds are the only thing that gets switched. Like I said, the design will call for a capacitor than when shorted through a relay coil, it will be able to pull the contact in far enough so that it can conduct. When the contacts meet, 12V will then be sent into the relay coil which will keep the relay in its closed position until the read cycle is terminate. Meanwhile, since the capacitor contained a logic 1 value (12V), the 12 source keeping the relay going will also recharge the capacitor.

Also recall that the relay coil will have a resistance of almost 200 Ohms, so it's not like a classical inductor that wouldn't be able to source a voltage when in parallel with the capacitor because of the inductor acting as a short.

The first thing that comes to my mind is that physical process are too slow and too unreliable for practical memory use. Also size would be an issue, for 1 GB of memory you would need to hold 10 billion of these individual cap/relay circuits on a chip. I don't even know if relay's can be integrated on a chip that small, plus external magnetic forces would wreak havoc on them since the force of the magnetic field used to control those tiny relays would be incredibly small.

As for choosing a capacitance, you would be very limited. Maybe a few picofarads at most. Also capacitors don't produce square waves, rather they make waves that look closer to smooth triangles. Not to mention that they would most likely discharge within a few minutes of having no power.

Using memristors instead of capacitors would be far more efficient.

The first thing that comes to my mind is that physical process are too slow and too unreliable for practical memory use. Also size would be an issue, for 1 GB of memory you would need to hold 10 billion of these individual cap/relay circuits on a chip. I don't even know if relay's can be integrated on a chip that small, plus external magnetic forces would wreak havoc on them since the force of the magnetic field used to control those tiny relays would be incredibly small.

As for choosing a capacitance, you would be very limited. Maybe a few picofarads at most. Also capacitors don't produce square waves, rather they make waves that look closer to smooth triangles. Not to mention that they would most likely discharge within a few minutes of having no power.

Using memristors instead of capacitors would be far more efficient.

Tiny relays you say?
http://www.elektrotech.hu/images/hjr1-2c-1.jpg

This was designed from the start to use off-the-shelf relays to build a computer (http://www.youtube.com/watch?v=n3wPBcmSb2U) but with actual memory based on relays.

This was designed from the start to use off-the-shelf relays to build a computer (http://www.youtube.com/watch?v=n3wPBcmSb2U) but with actual memory based on relays.

Ahh, I see. I was thinking you had something more revolutionary in mind.

That's still pretty cool though. I don't really know much about relay computers, but I can say that the caps will only hold a charge for a few minutes without any power.

caps will only hold a charge for a few minutes without any power.

no comprende