100314 Product Folder |
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| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
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| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
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| 100314 Low Power Quint Differential Line Receiver | 112 Kbytes | 2-Sep-98 | View Online | Download | Receive via Email |
| 100314 Mil-Aero Datasheet MN100314-X | 106 Kbytes | View Online | Download | Receive via Email |
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If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| 5962-9162901MXA | CERDIP | 24 | Status | Full production | N/A | N/A | 50+ | $22.50 | rail of 15 | NSZSSXXYYA> 100314DMQB /Q 5962-9162901MXA | ||
| 8-10 weeks | 500 | |||||||||||
| 5962-9162901MYA | CERQUAD | 24 | Status | Full production | N/A | N/A | 50+ | $30.60 | rail of 14 | NSZSSXXYYA Q> FMQB 5962 -9162901 MYA | ||
| 10-12 weeks | 500 | |||||||||||
| 5962-9162901VXA | CERDIP | 24 | Status | Full production | N/A | N/A | 50+ | $265.00 | rail of 15 | NSZSSXXYYA> 100314J-QMLV 5962-9162901VXA | ||
| N/A | 0 | |||||||||||
| 5962-9162901VYA | CERQUAD | 24 | Status | Full production | N/A | N/A | 50+ | $265.00 | rail of 14 | NSZSSXXYYA 100314W- QMLV 5962 -9162901 VYA > | ||
| N/A | 0 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date |
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| 100314FC | NONE | NSC SYNERGY | 04/04/95 |
The 100314 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply (VBB) is available for single-ended reception. When used in single-ended operation the apparent input threshold of the true inputs is 25 mV to 30 mV higher (positive) than the threshold of the complementary inputs. Unlike other F100K ECL devices, the inputs do not have input pull-down resistors. Active current sources provide common-mode rejection of 1.0V in either the positive or negative direction. A defined output state exists if both inverting and non-inverting inputs are at the same potential between VEE and VCC. The defined state is logic HIGH on the O#a-O#e outputs. |
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