100331 Product Folder |
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| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
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| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
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| 100331 Low Power Triple D Flip-Flop | 150 Kbytes | 2-Sep-98 | View Online | Download | Receive via Email |
| 100331 Mil-Aero Datasheet MN100331-X | 110 Kbytes | View Online | Download | Receive via Email |
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If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| 5962-9153601MXA | CERDIP | 24 | Status | Full production | N/A | N/A | 50+ | $30.60 | rail of 15 | NSZSSXXYYA> 100331DMQB /Q 5962-9153601MXA | ||
| 8-10 weeks | 500 | |||||||||||
| 5962-9153601MYA | CERQUAD | 24 | Status | Full production | N/A | N/A | | 50+ | $33.00 | rail of 14 | NSZSSXXYYA Q> FMQB 5962 -9153601 MYA | |
| 10-12 weeks | 500 | |||||||||||
| 5962-9153601VXA | CERDIP | 24 | Status | Full production | N/A | N/A | 50+ | $265.00 | rail of 15 | NSZSSXXYYA> 100331J-QMLV 5962-9153601VXA | ||
| N/A | 0 | |||||||||||
| 5962-9153601VYA | CERQUAD | 24 | Status | Full production | N/A | N/A | 50+ | $265.00 | rail of 14 | NSZSSXXYYA 100331W- QMLV 5962 -9153601 VYA > | ||
| N/A | 0 | |||||||||||
| 5962F9153601VYA | CERQUAD | 24 | Status | Full production | N/A | N/A | 50+ | $270.00 | rail of 14 | NSZSSXXYYA 100331WF QMLV 5962 F9153601 VYA > | ||
| N/A | 0 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date |
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| 100331FC | NONE | NSC SYNERGY | 04/04/95 |
The 100331 contains three D-type, edge-triggered master/slave flip-flops with true and complement outputs, a Common Clock (CPC), and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct Set (SDn) and Direct Clear (CDn) inputs. Data enters a master when both CPn and CPC are LOW and transfers to a slave when CPn or CPC (or both) go HIGH. The Master Set, Master Reset and individual CDn and SDn inputs override the Clock inputs. All inputs have 50 k Ohm pull-down resistors. |
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