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54ACT112  Product Folder

Dual JK Negative Edge Triggered Flip-Flop
General
Description		 Features Datasheet Package
& Models		 Samples
& Pricing

Parametric Table Parametric Table
Temperature Min (deg C) -55 
Temperature Max (deg C) 125 

Datasheet

TitleSize in KbytesDate
View Online
Download
Receive via Email
54ACT112 Dual JK Negative Edge-Triggered Flip-Flop 136 Kbytes 23-Sep-98 View Online Download Receive via Email
54ACT112 Mil-Aero Datasheet MN54ACT112-X 14 Kbytes   View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time		QtySPICEIBISQty$US each
5962-8995001M2A
(54ACT112LMQB)		LCC20StatusFull productionN/AN/A 
Buy Now		50+$8.00rail
of
50		NSZSSXXYYA
54ACT112
LMQB /QL>
5962-
8995001M2A
8 weeks500
5962-8995001MEA
(54ACT112DMQB)		CERDIP16StatusFull productionN/AN/A 
Buy Now		50+$3.20rail
of
25		NSZSSXXYYA>
54ACT112DMQB /QL
5962-8995001MEA
6-8 weeks500
5962-8995001MFA
(54ACT112FMQB)		CERPACK16StatusFull productionN/AN/A 
Buy Now 		50+$8.00rail
of
19		NSZSSXXYYA>
54ACT112FMQB
QL 5962-
8995001MFA
8-9 weeks500
5962-8995001B2ALCC20StatusFull productionN/AN/A 50+$15.60rail
of
50		NS 5962-
8995001B2A
27014 QS
ZSSXXYYA>
8 weeks500
5962-8995001BEACERDIP16StatusFull productionN/AN/A 50+$10.80rail
of
25		NS ZSSXXYYA>
5962-8995001BEA
27014 QS
6-8 weeks500
5962-8995001BFACERPACK16StatusFull productionN/AN/A 50+$15.60rail
of
19		NSZSSXXYYA>
5962-
8995001BFA
27014 QS
8-9 weeks500
5962-8995001S2ALCC20StatusFull productionN/AN/A 50+$138.00rail
of
50		NSZSSXXYYA
Q >
8995001S2A
27014
N/A0
5962-8995001SEACERDIP16StatusFull productionN/AN/A 50+$138.00rail
of
25		NS ZSSXXYYA>
5962-8995001SEA
27014
N/A0
5962-8995001SFACERPACK16StatusFull productionN/AN/A 50+$138.00rail
of
19		NSZSSXXYYA>
5962-
8995001SFA
27014 Q
N/A0

Obsolete Parts

Obsolete PartAlternate Part or SupplierSourceLast Time Buy Date
54ACT112DM-MLS
JM54ACT112SEA
NATIONAL SEMICONDUCTOR
09/04/2001
54ACT112FM-MLS
JM54ACT112SFA
NATIONAL SEMICONDUCTOR
09/04/2001

General Description

The 'ACT112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inputs can change when the clock is in either state without affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. A LOW signal on S#D or C#D prevents clocking and forces Q or Q# HIGH, respectively. Simultaneous LOW signals on S#D and C#D force both Q and Q# HIGH.

Asynchronous Inputs:

LOW input to S#D sets Q to HIGH level

LOW input to C#D sets Q to LOW level

Clear and Set are independent of clock

Simultaneous LOW on C#D and S#D makes both Q and Q#

HIGH

Features

  • 'ACT112 has TTL-compatible inputs
  • Outputs source/sink 24 mA
  • Standard Microcircuit Drawing (SMD) 5962-8995001
[Information as of 15-Jan-2004]

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