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54F109  Product Folder

Dual JK (Note: Overbar Over the K) Positive Edge-Triggered Flip-Flop
General
Description		 Features Datasheet Package
& Models		 Samples
& Pricing

Parametric Table Parametric Table
Temperature Min (deg C) -55 
Temperature Max (deg C) 125 

Datasheet

TitleSize in KbytesDate
View Online
Download
Receive via Email
Dual JK (Note: Overbar Over the K) Positive Edge-Triggered Flip-Flop 133 Kbytes 22-Oct-97 View Online Download Receive via Email
54F109 Mil-Aero Datasheet MN54F109-X 22 Kbytes   View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time		QtySPICEIBISQty$US each
54F109LMQBLCC20StatusFull productionN/AN/A 50+$4.08rail
of
50		NSZSSXXYYA
54F109LMQB
QL >
7-8 weeks500
54F109DMQBCERDIP16StatusFull productionN/AN/A 
Buy Now		50+$1.65rail
of
25		NSZSSXXYYA>
54F109DMQB
QL
6-8 weeks500
54F109FMQBCERPACK16StatusFull productionN/AN/A 50+$3.26rail
of
19		NSZSSXXYYA>
54F109FMQB
QL
7-8 weeks500
JM38510/34102B2ALCC20StatusFull productionN/AN/A 50+$4.80rail
of
50		NS JM38510
/34102B2A
27014 QS
ZSSXXYYA>
7-8 weeks500
JM38510/34102BEACERDIP16StatusFull productionN/AN/A 
Buy Now		50+$2.20rail
of
25		NS ZSSXXYYA>
JM38510/34102BEA
27014 QS
6-8 weeks500
JM38510/34102BFACERPACK16StatusFull productionN/AN/A 50+$5.60rail
of
19		NSZSSXXYYA>
JM38510/
34102BFA
27014 QS
7-8 weeks500
JM38510/34102SEACERDIP16StatusFull productionN/AN/A 50+$145.00rail
of
25		NSZSSXXYYA>
JM38510/34102SEA
27014 QS
N/A0
JM38510/34102SFCERPACK16StatusFull productionN/AN/A 50+$145.00rail
of
19		NSZSSXXYYA>
JM38510/
34102SFA
27014 QS
N/A0

Obsolete Parts

Obsolete PartAlternate Part or SupplierSourceLast Time Buy Date
54F109DM
54F109DMQB
NATIONAL SEMICONDUCTOR
03/09/99

General Description

The 'F109 consists of two high-speed, completely independent transition clocked JK# flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK# design allows operation as a D flip-flop (refer to 'F74 data sheet) by connecting the J and K# inputs.

Asynchronous Inputs:

LOW input to S#D sets Q to HIGH level

LOW input to C#D sets Q to LOW level

Clear and Set are independent of clock

Simultaneous LOW on C#D and S#D makes both Q and Q#

HIGH

Features

  • Guaranteed 4000V minimum ESD protection.
[Information as of 15-Jan-2004]

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