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54F193
54F193 Product Folder |
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| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
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| Title | Size in Kbytes | Date | View Online |
Download |
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| 54F193 Up Down Binary Counter with Separate Up Down Clocks | 191 Kbytes | 9-Dec-97 | View Online | Download | Receive via Email |
| 54F193 Mil-Aero Datasheet MN54F193-X | 27 Kbytes | View Online | Download | Receive via Email |
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If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| 54F193LMQB | LCC | 20 | Status | Full production | N/A | N/A |  | 50+ | $9.40 | rail of 50 | NSZSSXXYYA 54F193 LMQB /QL > | |
| 8-9 weeks | 500 | |||||||||||
| 54F193DMQB | CERDIP | 16 | Status | Full production | N/A | N/A | 50+ | $9.40 | rail of 25 | NSZSSXXYYA> 54F193DMQB QL | ||
| 6-8 weeks | 500 | |||||||||||
| JM38510/34304B2A | LCC | 20 | Status | Full production | N/A | N/A | 50+ | $9.60 | rail of 50 | NS JM38510 /34304B2A 27014 QS ZSSXXYYA> | ||
| 8-9 weeks | 500 | |||||||||||
| JM38510/34304BEA | CERDIP | 16 | Status | Full production | N/A | N/A | | 50+ | $17.00 | rail of 25 | NS ZSSXXYYA> JM38510/34304BEA 27014 QS | |
| 6-8 weeks | 500 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date |
|---|---|---|---|
| 54F193FMQB | 54F193DMQB | NATIONAL SEMICONDUCTOR | 06/08/99 |
The 'F193 is an up/down modulo-16 binary counter. Separate Count Up and Count Down Clocks are used, and in either counting mode the circuits operate synchronously. The outputs change state synchronously with the LOW-to-HIGH transitions on the clock inputs. Separate Terminal Count Up and Terminal Count Down outputs are provided that are used as the clocks for subsequent stages without extra logic, thus simplifying multi-stage counter designs. Individual preset inputs allow the circuit to be used as a programmable counter. Both the Parallel Load (PL#) and the Master Reset (MR) inputs asynchronously override the clocks. |
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