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54F280  Product Folder

9-Bit Parity Generator/Checker
General
Description		 Features Datasheet Package
& Models		 Samples
& Pricing

Parametric Table Parametric Table
Temperature Min (deg C) -55 
Temperature Max (deg C) 125 

Datasheet

TitleSize in KbytesDate
View Online
Download
Receive via Email
54F280 9-Bit Parity Generator Checker 152 Kbytes 3-Dec-97 View Online Download Receive via Email
54F280 Mil-Aero Datasheet MN54F280-X 18 Kbytes   View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time		QtySPICEIBISQty$US each
54F280LMQBLCC20StatusFull productionN/AN/A 50+$8.60rail
of
50		NSZSSXXYYA
54F280
LMQB /QL
>
7-8 weeks500
54F280DMQBCERDIP14StatusFull productionN/AN/A 
Buy Now		50+$7.10rail
of
25		NSZSSXXYYA>
54F280DMQB
QL
6-8 weeks500
54F280FMQBCERPACK14StatusFull productionN/AN/A 50+$8.60rail
of
19		NSZSSXXYYA>
54F280FMQB
QL
7-8 weeks500
JM38510/34901B2ALCC20StatusFull productionN/AN/A 50+$8.00rail
of
50		NS JM38510
/34901B2A
27014 QS
ZSSXXYYA>
6-8 weeks500
JM38510/34901BCACERDIP14StatusFull productionN/AN/A 
Buy Now		50+$8.15rail
of
25		NS ZSSXXYYA>
JM38510/34901BCA
27014 QS
6-8 weeks500
JM38510/34901BDACERPACK14StatusFull productionN/AN/A 
Buy Now		50+$7.50rail
of
19		NSZSSXXYYA>
JM38510/
34901BDA
27014 QS
7-8 weeks500
54F280J-MLSCERDIP14StatusPreliminaryN/AN/A   rail
of
N/A		NSZSSXXYYA>
54F280J-MLS
N/A0

Obsolete Parts

Obsolete PartAlternate Part or SupplierSourceLast Time Buy Date
54F280DM.
54F280DMQB
NATIONAL SEMICONDUCTOR
12/02/2003
54F280DM.
54F280DMQB
NATIONAL SEMICONDUCTOR
12/02/2003
54F280DM.
54F280DMQB
NATIONAL SEMICONDUCTOR
12/02/2003
54F280FM-MLS
54F280FMQB
NATIONAL SEMICONDUCTOR
03/09/99

General Description

The 'F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output.

Features

  • Guaranteed 4000V minimum ESD protection
[Information as of 15-Jan-2004]

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