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54F373  Product Folder

Octal Transparent Latch with TRI-STATE Outputs
General
Description		 Features Datasheet Package
& Models		 Samples
& Pricing

Parametric Table Parametric Table
Temperature Min (deg C) -55 
Temperature Max (deg C) 125 

Datasheet

TitleSize in KbytesDate
View Online
Download
Receive via Email
54F373 Octal Transparent Latch with TRI-STATE(RM) Outputs 174 Kbytes 9-Dec-97 View Online Download Receive via Email
54F373 Mil-Aero Datasheet MN54F373-X 14 Kbytes   View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part NumberPackageStatusModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
TypePinsMSL/Lead-Free AvailabilityLead
Time		QtySPICEIBISQty$US each
54F373LMQBLCC20StatusFull productionN/AN/A 50+$4.40rail
of
50		NSZSSXXYYA
54F373
LMQB /QL
>
7-8 weeks500
54F373DMQBCERDIP20StatusFull productionN/AN/A 
Buy Now		50+$2.20rail
of
20		NSZSSXXYYA>
54F373DMQB
QL
6-8 weeks500
54F373FMQBCERPACK20StatusFull productionN/AN/A 50+$4.00rail
of
19		NSZSSXXYYA>
54F373FMQB
QL
7-8 weeks500
JM38510/34601B2ALCC20StatusFull productionN/AN/A 50+$4.75rail
of
50		NS JM38510
/34601B2A
27014 QS
ZSSXXYYA>
7-8 weeks500
JM38510/34601BRACERDIP20StatusFull productionN/AN/A 
Buy Now		50+$2.32rail
of
20		NS ZSSXXYYA>
JM38510/34601BRA
27014 QS
6-8 weeks500
JM38510/34601BSACERPACK20StatusFull productionN/AN/A 50+$4.50rail
of
19		NSZSSXXYYA>
JM38510/
34601BSA
27014 QS
7-8 weeks500
JM38510/34601SRACERDIP20StatusFull productionN/AN/A 50+$145.00rail
of
20		NSZSSXXYYA>
JM38510/34601SRA
27014 Q
N/A0
JM38510/34601SSACERPACK20StatusFull productionN/AN/A 50+$145.00rail
of
19		NSZSSXXYYA>
27014 JM38510/
34601SSA
N/A0

Obsolete Parts

Obsolete PartAlternate Part or SupplierSourceLast Time Buy Date
54F373DM
54F373DMQB
NATIONAL SEMICONDUCTOR
03/09/99

General Description

The 'F373 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH the bus output is in the high impedance state.

Features

  • Eight latches in a single package
  • TRI-STATE outputs for bus interfacing
  • Guaranteed 4000V minimum ESD protection
[Information as of 15-Jan-2004]

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