 
| ADC12062 Product Folder | 
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| General Description | Features | Datasheet | Package & Models | Samples & Pricing | Reliability Metrics | 
| Title | Size in Kbytes | Date |  View Online |  Download |  Receive via Email | 
|---|---|---|---|---|---|
| ADC12062 12-Bit, 1 MHz, 75 mW A D Converterwith Input Multiplexer and Sample Hold | 496 Kbytes | 26-Jun-01 | View Online | Download | Receive via Email | 
| ADC12062 12-Bit, 1 MHz, 75 mW A D Converterwith Input Multiplexer and Sample Hold (JAPANESE)  | 906 Kbytes |  |  |  | 
| If you have trouble printing or viewing PDF file(s), see Printing Problems. | 
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| ADC12062CIV | PLCC | 44 | Status | Lifetime buy | N/A | N/A |   | 1K+ | $5.50 | rail of 25 | NSUZXYYTT ADC12062CIV | |
| 15-16 weeks | 5000 | |||||||||||
| ADC12062BIVF | PQFP | 44 | Status | Lifetime buy | N/A | N/A | 250+ | $25.00 | tray of 96 | NSUZXYYTT ADC12062 BIVF DIE-RUN-## | ||
| 15-16 weeks | 5000 | |||||||||||
| ADC12062CIVF | PQFP | 44 | Status | Lifetime buy | N/A | N/A |  | 1K+ | $5.50 | tray of 96 | NSUZXYYTT ADC12062 CIVF DIE-RUN-## | |
| 15-16 weeks | 5000 | |||||||||||
| Obsolete Part | Alternate Part or Supplier | Source | Last Time Buy Date | 
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| ADC12062BIV | NONE | NONE | 09/08/99 | 
| ADC12062BIVF | NA | ADC12062BIVF | 12/01/2004 | 
| ADC12062CIV | NA | ADC12062CIV | 12/01/2004 | 
| ADC12062CIVF | NA | ADC12062CIVF | 09/01/2004 | 
| ADC12062EVAL | NONE | NONE | 03/08/2000 | 
| ADC12062WM-QML | NONE | NONE | 01/29/98 | 
| Using an innovative multistep conversion technique, the 12-bit ADC12062 CMOS analog-to-digital converter digitizes signals at a 1 MHz sampling rate while consuming a maximum of only 75 mW on a single +5V supply. The ADC12062 performs a 12-bit conversion in three lower-resolution "flash" conversions, yielding a fast A/D without the cost and power dissipation associated with true flash approaches. The analog input voltage to the ADC12062 is tracked and held by an internal sampling circuit, allowing high frequency input signals to be accurately digitized without the need for an external sample-and-hold circuit. The multiplexer output is available to the user in order to perform additional external signal processing before the signal is digitized. When the converter is not digitizing signals, it can be placed in the Standby mode; typical power consumption in this mode is 100 µW. | 
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| Part Number | Process | Early Failure Rate - Rejects | Sample Size (EFR) | PPM * | Rel. Rejects | Device Hours | Long Term Failure Rates (FITS) | MTTF | 
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| ADC12062BIVF | CS100 | 3 | 19400 | 155 | 0 | 900000 | 4 | 254464808 | 
| ADC12062CIV | CS100 | 3 | 19400 | 155 | 0 | 900000 | 4 | 254464808 | 
| ADC12062CIVF | CS100 | 3 | 19400 | 155 | 0 | 900000 | 4 | 254464808 | 
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