DS90CR286A  Product Folder

The DS90CR286A receiver converts the four LVDS data streams (Up to 1.848 Gbps throughput or 231 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data. Also available is the DS90CR216A that converts the three LVDS data streams (Up to 1.386 Gbps throughput or 173 Megabytes/sec bandwidth) back into parallel 21 bits of CMOS/TTL data. Both Receivers' outputs are Rising edge strobe.

Both devices are offered in TSSOP packages. In addition the DS90CR286A is also offered in a space saving 64 ball, 0.8mm fine pitch ball grid array (FBGA) which provides a 44% reduction in PCB footprint compared to the 56L TSSOP package.

The DS90CR286A / DS90CR216A devices are enhanced over prior generation receivers and provided a wider data valid time on the receiver output.

This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.

• 20 to 66 MHz shift clock support
• 50% duty cycle on receiver output clock
• Best-in-Class Set & Hold Times on RxOUTPUTs
• Rx power consumption <270 mW (typ) @66MHz Worst Case
• Rx Power-down mode <200µW (max)
• ESD rating >7 kV (HBM), >700V (EIAJ)
• PLL requires no external components
• Compatible with TIA/EIA-644 LVDS standard
• Low profile 56-lead or 48-lead TSSOP package
• DS90CR286A is also offered in a space saving 64 ball FBGA package
• Operating Temperature: -40°C to +85°C