SCAN926260 Product Folder |
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| General Description |
Features | Datasheet | Package & Models |
Samples & Pricing |
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| Title | Size in Kbytes | Date | View Online |
Download |
Receive via Email |
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| SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST | 369 Kbytes | 8-Dec-03 | View Online | Download | Receive via Email |
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If you have trouble printing or viewing PDF file(s), see Printing Problems. |
| Part Number | Package | Status | Models | Samples & Electronic Orders | Budgetary Pricing | Std Pack Size | Package Marking | |||||
| Type | Pins | MSL/Lead-Free Availability | Lead Time | Qty | SPICE | IBIS | Qty | $US each | ||||
| SCAN926260TUF | LBGA | 196 | Status | Full production | N/A | scan926260tuf.ibs | | 1K+ | $24.00 | tray of 119 | NSUZXYYTT SCAN926260T UF BBBBB | |
| 2-6 weeks | 3000 | |||||||||||
The SCAN926260 integrates six 10-bit deserializer devices into a single chip. The SCAN926260 can simultaneously deserialize up to six data streams that have been serialized by National Semiconductor's 10-bit Bus LVDS serializers. In addition, the SCAN926260 is compliant with IEEE standard 1149.1 and also features an At-Speed Built-In Self Test (BIST). For more details, please see the sections titled "IEEE 1149.1 Test Modes" and "BIST Alone Test Modes." Each deserializer block in the SCAN926260 has it's own powerdown pin (PWRDWN[n]#)and operates independently with its own clock recovery circuitry and lock-detect signaling. In addition, a master powerdown pin (MS_PWRDWN#) which puts all the entire device into sleep mode is provided. The SCAN926260 uses a single +3.3V power supply and consumes 1.2W at 3.3V with a PRBS-15 pattern on all channels at 660Mbps. |
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