What's New:
	SCAN50C400 (product brief) Quad 1.25/2.5/5.0 Gbps backplane SerDes
	DS92LV18 18-Bit Bus LVDS SerDes - 15-66 MHz
	DS90CR485/486 6.4 Gbps, 48-bit, 66-133MHz SerDes Chipset with Pre-emphasis, Cable Deskew, and DC Balance
	SCAN928028/6260 Integrated 10-bit, 8-channel Serializer, 6-channel Deserializer with JTAG and At-Speed BIST
	DS92UT16 Utopia-to-LVDS Bridge, BSDL Model, Evaluation Kit
	Product Tree:
•	LVDS PHYs: Line Drivers and Receivers
•	Bus LVDS PHYs: Transceivers and Repeaters
•	Channel Link
•	Bus LVDS SerDes
•	SCAN LVDS
•	Crosspoints
Selection Guides:
Interface Products Selection Guide (pdf 1.79MB)        The National Gallery of New Products (pdf 383KB)       Linear/Mixed-Signal Designer's Guide (pdf 6MB)

LVDS Design Guide:

LVDS Owner's Manual (2^nd Edition)

Product Design Guides:

• DS92LV16 16-bit SerDes (pdf 3MB)

Resources:

• Application Notes          
• Evaluation Kits          
• IBIS Models & Simulation          
• 1149.1 JTAG BSDL Models

Transmission Line RAPIDESIGNER Slide Rule:

• English Units RAPIDESIGNER      
• Metric Units RAPIDESIGNER      
• RAPIDESIGNER Operation and Applications Guide (AN-905) (pdf 133KB)

Order your Analog & Interface Databook or Website CD ROM

White Papers:

• Archives: View past conference papers

Packaging:

• SOIC Narrow      
• TSSOP      
• FBGA      
• TE-PBGA      
• TQFP      
• LLP      
• LQFP      
• CSP      
• Other Packaging

Analog University:

• What is LVDS?          
• LVDS Bus Configuration          
• Transmission Lines for LVDS

Online Seminars:

• Introduction to LVDS John Goldie (10/11/01)          
• BLVDS (Bus Low Voltage Differential Signaling) John Goldie (7/12/01)

Intro to LVDS:

• LVDS       
• Bus LVDS (BLVDS)

National Edge Articles:

• The Many Flavors of LVDS      
• Eye Opening Enhancements extend the reach of high-speed Interfaces

Press Releases

Links to Industry Standards